Xilinx Demonstrates 1 To 5 Watts Lower Power Per FPGA In Virtex-4 Family Compared To Competing FPGAs
SAN JOSE, Calif., March 24, 2005 - Xilinx, Inc. (NASDAQ: XLNX), the world's leading supplier of programmable logic solutions, today announced version 4.1 of its Web Power Tool and, again, confirms the power advantage of the Virtex-4 family of 1 to 5 Watts versus competing FPGAs. This significant power advantage is demonstrated through laboratory hardware measurements and simulations of the company's Virtex-4 devices and competing 90nm production-qualified devices. The lead in low-power consumption is achieved through the exclusive 90nm triple-oxide technology, embedded IP and unique power-saving configuration circuitry.
The power consumption advantages inherent to Virtex-4 FPGAs reduce system power supply and cooling costs, improving long-term system reliability and lowering total system costs. Furthermore, this power reduction enables designers to achieve the highest levels of performance in the industry without exceeding their power budget. The 1 to 5 Watts advantage in Virtex-4 devices is the total power reduction per FPGA derived from up to 73 percent lower static power and up to 86 percent lower dynamic power. Detailed data is available now on the Xilinx website at www.xilinx.com/virtex4/lowpower.
"Power consumption has become an increasingly important consideration in a very wide range of applications," said Jordan Selburn, principal analyst at iSuppli. "Excess power impacts system costs through more expensive packaging requirements, fans, heat sinks, etc."
"Using real-world hardware measurements at realistic junction temperatures in the lab, we compared our devices head-to-head with competitive 90nm devices," said Andy DeBaets, senior director of systems and application engineering of the Advanced Products Division at Xilinx. "Despite competitors' attempts to overcome their power consumption disadvantage by presenting revised data, Virtex-4 devices demonstrate an indisputable 1 to 5 Watts lower power."
Lower Power at Realistic Junction Temperatures
Temperature and power consumption are inter-dependent. This is critical for static power as leakage current increases with temperature. FPGA Designers for networking, wireless, storage and other applications have ambient temperatures in the chassis that significantly exceed room temperature - this leads to junction temperatures of 85oC and beyond for many systems. Any power consumption data acquisition and comparison must be done at least at Tj=85oC. Competitive comparisons at lower junction temperatures (e.g., 25oC) are insufficient and not indicative of realistic operating conditions.
Virtex-4 Web Power Tool Version 4.1 Available Now
The latest version 4.1 web power, available now at www.xilinx.com/virtex4/lowpower provides users with several new enhancements including power estimation for the hard-IP FIFO capability present in all Virtex-4 devices. Version 4.1 also provides support for Xilinx Virtex-4 FX devices giving power data for the embedded IBM PowerPC processor and RocketIO multi-gigabit transceivers. Further, the tool now allows the ability to override default Theta-JA (Junction to Ambient Thermal Resistance) values for the FPGA, allowing designers to estimate power consumption using their specific heat sink characteristics. Additionally, thermal support for all 17 devices and all Virtex-4 packages in the LX, SX, and FX platforms is also provided.
About Xilinx Virtex-4 Platform FPGAs
Named 2004 Product of the Year by Electronic Products Magazine, Xilinx Virtex-4 FPGAs deliver more options, higher performance and lower power than any other FPGA family available today. With more than 100 technical innovations, the Virtex-4 family consists of 17 devices and three domain-optimized platforms; Virtex-4 LX FPGAs optimized for logic-intensive designs, Virtex-4 SX FPGAs optimized for high-performance signal processing, and Virtex-4 FX FPGAs optimized for high-speed serial connectivity and embedded processing. A multi-platform approach makes it possible for customers to select the optimal mix of resources for their application to achieve the highest functionality and breakthrough performance at the lowest cost. Devices are shipping now. For more information on the Virtex-4 product family, visit www.xilinx.com/virtex4.
Xilinx is the worldwide leader in complete programmable logic solutions. For more information, visit www.xilinx.com.
|
Xilinx, Inc. Hot IP
Related News
- Latest Data Shows Xilinx Virtex-4 FPGAs Consume Less Than 1/10th The Power Of Competing FPGAs
- Xilinx Unveils Virtex-4 Family - Industry's First Multi-Platform FPGA
- Xilinx Expands Reach in Aerospace and Defense Market with Virtex-4 QPro Product Family
- PLDA's XpressFX Prototyping Platform, Based on the Xilinx Virtex-4 FX FPGA, Achieves Record Sales
- Panasonic Chooses Xilinx Virtex-4 And Spartan-3 FPGAs For Professional Broadcast High Definition Camera-Recorder
Breaking News
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- TSMC drives A16, 3D process technology
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |