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D&R Headline News (March 2000)
Headlines for Thursday Mar. 30, 2000
Latest News- Tool generates VHDL, Verilog testbenches
- Cadence Selects inSilicon Technology for System-on-Chip Design Services
- TSMC opens Tainan fab, plus 300-mm pilot line
Headlines for Wednesday Mar. 29, 2000
Latest News- Modules add Mips to Infineon Carmel DSP core
- Model Technology and Platform Computing Corp. Dramatically Increase Simulation Capacity for Server Farms
Headlines for Tuesday Mar. 28, 2000
Latest News- Mentor ports design-for-test tools to 64 bits
- Programs seeks to boost over-the-Web core evaluation
- Xilinx outlines modular programmable design capability
- Yamaha licenses Motorola MCore
Headlines for Monday Mar. 27, 2000
Latest News- Cast introduces fast D80530 core for 8051 microcontroller-Based Designs
- Cast unveils New Cores at DATE 2000
- LSI Logic, NEC adopt MoSys 1T-SRAM technology
- TransEDA Chosen by ARM for Design Verification of Microprocessor Cores
- Frontier refines C-based synthesis tool
- Monterey Design Systems announces physical design prototyping tool for design closure of ASIC and ASSP designs
- Sican joins ARM design services program
- A decisive development in the electronic systems (SOC) manufacturing cycle: Design And Reuse and IBM create the first qualified virtual marketplace for electronic IPs
- Design And Reuse expands intellectual property (IP) technical service offering through purchase of Simutech's Rave Prototyper Technology
Headlines for Thursday Mar. 23, 2000
Latest News- Synopsys and Compaq Announce First Simulation Model for New PCI-X Standard
- Design reuse requires culture change, IP developers say
- Verification answers sought for SoC designs
- ARM cores to include digital rights-management technology
Headlines for Wednesday Mar. 22, 2000
Latest News- Altera and Palmchip Partner to Speed Time-to-Market For System-On-A-Programmable-Chip Integration
- Philips exec finds IP unusable, but necessary
- QuArc launches digital video codec core
- ARM files patent infringement suit against picoTurbo
- ARC Cores acquires two small IP vendors
Headlines for Tuesday Mar. 21, 2000
Latest News- Acquisitions boost ARC Cores configurable processor platform
- Repositories called linchpin of widespread design reuse
- Xilinx AllianceCORE Partners Announce Four 8-Bit Microcontrollers for Xilinx FPGAs
- Fujitsu climbs Web-based design learning curve
Headlines for Monday Mar. 20, 2000
Latest News- SoC Design Productivity Enhancement from YXI: XE Tool Suite version 1.3
- DualSoft announces Industry's First Automatic Document Generation Utility for Verilog and VHDL Designs
- Synopsys' move to free libraries may rattle IP market
- Xilinx and Qualis Partner to Develop Internet-enabled Design Reuse Methodology for ASIC and FPGA Designers
- Integration skills critical to survival in IP world, keynoter says
- OpenMORE RTL Rule Checker from Interra Accelerates Evaluation and Assessment of Reusable IP From Months to Days
- DSP Group and Endeavor Intertech Announce High Performance, Certified Accurate Instruction Set Simulation for TeakDSPCore
- DualSoft tool documents IP, BOPS revs 3-D rendering
- MIPS Technologies and TSMC form strategic alliance to deliver "hard" versions of MIPS 32 and 64 Bit Processor Cores
- Mentor Graphics Targets Inventra IP for Actel FPGA Devices
- OpenMORE RTL Rule Checker from Interra Accelerates Evaluation and Assessment of Reusable IP From Months to Days
Headlines for Friday Mar. 17, 2000
Latest NewsHeadlines for Thursday Mar. 16, 2000
Latest NewsHeadlines for Tuesday Mar. 14, 2000
Latest News- Xilinx and Xentec announce Internet data encryption solutions for Virtex Series and Spartan-II FPGAs
- TSMC to offer ARM cores for telecommunications SOC devices
- VSIA releases on-chip bus interface standard to facilitate design reuse
Headlines for Monday Mar. 13, 2000
Latest News- Numeritech announces Texas Instruments to license phase shifting technology to support 0.13-micron Process
- 0-In Design ships verification tool
- DSP Group selects Verisity's Specman Elite to cut Verification Time for latest Dual MAC DSP Cores
- Xilinx, Xentec roll out image compression cores
- LSI Logic invests in voice-over-DSL provider Tollbridge Technologies
Headlines for Wednesday Mar. 08, 2000
Latest News- Virage Logic first to deliver 0.15 micron Embedded Memory Compilers
- Additional Library Vendors Join Synopsys' Tap-In Program to Streamline Design Process
- Bops discloses new cores targeted at improving 3D graphics and visual realism
- French firm offers $6 vision system-on-a-chip
- EDA executive warns of piling up complexities in SoC designs
Headlines for Tuesday Mar. 07, 2000
Latest News- ARM exec slotted as next VSIA president
- Intellectual-property issues stall SoC designs
- Executives question value of 'free' processor cores from Internet
Headlines for Monday Mar. 06, 2000
Latest News- Seven Million Gate Design Emulated in-circuit
- Foundry deals shaking processor-IP model at its core
- Synopsys' New Highest-Performance VHDL Simulator Expands Support for System Design and Verification
- Design VERIFYer 3.0 Increases Avant!'s Lead in Formal Equivalence Checking
- Xilinx and Silicon & Software Systems `S3' Announce PCI Design Services Partnership
- European Space Agency launches free Sparc-like core
- Improv rolls reconfigurable processors
- Cypress spins out programmable SOC company for wireless market
- Altera targets DSP-based comms; ISS spins PCI core
- Pivotal Technologies receives major customer win from Texas Instruments
Headlines for Friday Mar. 03, 2000
Latest NewsHeadlines for Thursday Mar. 02, 2000
Latest NewsHeadlines for Wednesday Mar. 01, 2000
Latest News- BOPS Appoints Former ARM Exec., Carl Schlachte, as CEO
- CoWare N2C Version 2.1 Enhances Simulation Performance and Accuracy