English
D&R Headline News (June 2000)
Headlines for Thursday Jun. 29, 2000
Latest News- Aldec Forms Strategic Partnership with Synac to Offer IP Customers New Resources
- Zoran to acquire CMOS image sensor developer PixelCam
- inSilicon Expands USB Capabilities with Vanteon's Software and Services
Headlines for Wednesday Jun. 28, 2000
Latest NewsHeadlines for Tuesday Jun. 27, 2000
Latest News- ARM Introduces Trace Debug Tools for ARM Developer Suite[tm]
- Motorola releases lower-cost version of embedded PowerQUICC MPU
Headlines for Monday Jun. 26, 2000
Latest News- Credence invests in test IP firm, plans new series for ASICs and Rambus testing
- Xilinx releases new high performance communications cores
- Xilinx and Integrated Silicon Systems announce stategic development agreement
- inSilicon and Cadence Design Systems Unite to Develop Integrated USB 2.0 Analog Transceiver
- Mentor Graphics Introduces First Industry-Standard 8-bit Processor Core With On-Chip Debug
- Standard eases IP tracking for royalty calculations
Headlines for Saturday Jun. 24, 2000
Latest NewsHeadlines for Friday Jun. 23, 2000
Latest News- Rambus to seek range of licensing deals after settling with Hitachi
- Oki plans CMOS single-chip Bluetooth solution
- ARM announced it has significantly expanded its patent infringement lawsuit against picoTurbo, Inc.
Headlines for Thursday Jun. 22, 2000
Latest News- Hitachi ends Rambus patent dispute by licensing memory interface
- Toshiba to pay SDRAM royalties to Rambus
Headlines for Wednesday Jun. 21, 2000
Latest News- Cadence tool creates Verilog model from Spice netlist
- Philips to buy former MiCRUS Semiconductor fab from IBM
Headlines for Tuesday Jun. 20, 2000
Latest News- Mentor Graphics Named Leading IP Services Provider and Commodity IP Vendor In Inaugural Dataquest IP Market Study
- Chip makers show latest DSPs
- Provis builds Verilog simulator with off-the-shelf parts
- Intel revises processor cores to boost speed, shrink die
- IBM describes its first Infiniband chips
- ARM Strengthens Technology Access Program with Global Network of Design Centers
Headlines for Monday Jun. 19, 2000
Latest News- QuickLogic picks MIPS, PixelFusion opts for ARC
- CynApps and Chronology Partner to Reduce Design Verification Time
- Virage Logic Targets Internet Applications - Embedded CAMs Triple the Flow Of Traffic Over the Network
- Denali launches Databahn memory subsystem generator
Headlines for Friday Jun. 16, 2000
Latest NewsHeadlines for Thursday Jun. 15, 2000
Latest News- Court Dismisses Patent Case against Quickturn Design Systems Brought by Aptix Corporation and Meta Systems Inc.
- Cirrus Logic Expands ARM® Core Portfolio
Headlines for Wednesday Jun. 14, 2000
Latest News- TSMC to build Manta DSP for BOPS
- Texas Instruments fields high-speed 'C64x DSP
- Tensilica[tm] Unveils Feature-Rich Third Generation Xtensa[tm] Configurable Processor Technology
- ARC Cores revolutionizes 32-bit microprocessor enhancements with plug-in extensions
- Lexra Announces Breakthrough Network Processing Architecture
Headlines for Tuesday Jun. 13, 2000
Latest News- ASIC Alliance expands into reusable-IP sector
- TSMC and BOPS Team to Produce Highest-Performance, Programmable, Single-Chip DSP Chip in Industry
- MIPS and Wind River form center for embedded apps
- Lexra clones Mips core, tailors features to boost network processing performance
- JEDI Technologies Delivers Java Acceleration Solution for MIPS-Based Processors JSTAR Accelerator is Particularly Appealing for Wireless Internet Applications
- Infineon Technologies Announces New Version Of TriCore[tm] Unified Processor Architecture for Embedded Devices
Headlines for Monday Jun. 12, 2000
Latest News- Red Hat<sup><font size=-1>®</font></sup> to Deliver GNUPro<sup><font size=-1>©</font></sup> Tools for Altera Excalibur<sup><font size=-1>TM</font></sup> Embedded Processor Solutions
- Motorola and Altera Have Entered Discussions Toward an Embedded Processor Technology Licensing Agreement
- Altera Introduces The Nios Embedded Processor, Industry's First RISC-Based Embedded Processor Developed for SOPC Integration
- BOPS Announces Manta, the Highest-performance Programmable DSP Chip Available for Internet, Multimedia and Wireless CommunicationsApplications Development Business Editors/Technology Writers
- Altera Licenses ARM Core To Enable System-On-A-Programmable-Chip Design
- Altera and MIPS Technologies Agreement Fuels Next-Generation System-on-a-Programmable-Chip Design
- MIPS shows 20K 64-bit core
- Altera cores support PCI; inSilicon demos USB apps
- NEC Licenses MIPS32 4K(TM) Family Microprocessor Cores from MIPS Technologies
- Wind River, MIPS Technologies Create Center of Excellence, Align High-Demand Embedded RISC Processors, Development Tools
- Mentor Graphics and Cypress Semiconductor Announce Web-Based Delivery of Optimized IP Solutions for Programmable Communications Devices
- UMC offers nTool's Web-based tracking tool to foundry customers
- Lucent rolls out its first StarCore-based DSP, promises to double Internet chip capacity
- DNA Enterprises, Inc. Unveils New PowerPC Product Line
- Startup spins 1-GHz CPU for embedded apps
- Triscend CSoCs Speed Communications Systems Development with Addition of HDLC Core to Soft Module Library
Headlines for Sunday Jun. 11, 2000
Latest NewsHeadlines for Saturday Jun. 10, 2000
Latest News- Lexra offers NetVortex net processor as licensable core
- ARC to open its core to third-party plug-ins
Headlines for Friday Jun. 09, 2000
Latest News- Optimism abounds for Net-based design
- De Man calls for new breed of engineer, tools and methodologies
Headlines for Thursday Jun. 08, 2000
Latest News- ADI adds new DSP core to motor control offerings
- DAC panel fingers embedded design needs
- Design & Reuse and Dassault Systemes announce their intent to form a strategic alliance to expand Design & Reuse's B2B leadership position in IP commerce
Headlines for Wednesday Jun. 07, 2000
Latest NewsHeadlines for Tuesday Jun. 06, 2000
Latest News- Dynamic Details builds on IPO with quick-turn mfg., prototype services
- IP reuse called essential to advanced chip designs
- TransEDA tool aims to catch bugs earlier, improve design reuse
- IBM unveils PowerPC chips, cores for networking applications
Headlines for Monday Jun. 05, 2000
Latest News- WDC announces our Professor's kit
- Genesys Testware introduces first full chip behavioral test sysnthesis tool
- BOPS Appoints Zafar Malik as Vice President of Design Services
- SiliconBackplane unsnarls memory bottlenecks
- Legend Design Technology released automatic memory IP characterization tools
- Actel plans to produce FPGAs as ASIC cores
- Cadence Design Services adds BOPS, Inc. to the Cadence Surelink Supply-Chain Network
- Dataquest halves EDA market growth forecast
- 32-bit NeuroMatrix(r) RISC Core from RC Module is Ready for 64-bit Multimedia Extension
- ARM joins Verisity's pure IP program
- Verisity announces LSI Logic joins Verisity's Pure IP Program
- AMIRIX Signs IP Cores Distribution Agreement with Wyle
- IBM PowerPC chips to speed network communications and computing
- Sican Shows Largest Revenue Growth Rate Among Top 10 Worldwide Semiconductor IP Vendors
Headlines for Thursday Jun. 01, 2000
Latest News- inSilicon JVX[tm] Accelerator Speeds Java Technology-based Wireless Internet Products
- 4i2i Announces Motion JPEG VHDL Encoder and Decoder Core
- HAVi Announces New Members, Officers and Programs