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D&R Headline News (June 2002)
Headlines for Friday Jun. 28, 2002
Latest News- Novas Leads EDA Industry in Customer Satisfaction for Third Consecutive Year
- Ignios Appoints Rick Clucas as Chief Executive Officer
Headlines for Thursday Jun. 27, 2002
Latest NewsHeadlines for Wednesday Jun. 26, 2002
Latest News- Wipro Technologies unveils Version 1.1 of its Home Gateway Software Solution with DSL Support
- Intrinsyc Completes Acquisition of NMI Electronics
- SynTest, Intellitech add BIST products
- Motorola makes TSMC its foremost foundry
- Agere Systems Announces Comprehensive 90 Nanometer Custom Chip Platform Targeted for Communications Applications
Headlines for Tuesday Jun. 25, 2002
Latest News- Altera Raises the Bar for IP Core Quality
- Chartered names new chief executive
- SuperH, Inc. Launches Impressive IP Partner Program - Largest new program announced by microprocessor IP company
Headlines for Monday Jun. 24, 2002
Latest News- Wipro Technologies opens Design Centre in Kiel, Germany
- Infineon's DSP core swap shop
- Xilinx Enables 300 MSPS Programmable DSP Systems With New Virtex-II Pro FPGAs
- Actel Joins HyperTransport Technology Consortium
- Amlogic selects ARC's industry leading SoC IP technology for single-chip progressive scan DVD controller
- New Features in Altera's DSP Builder Version 2.0 Deliver Unparalleled Productivity for DSP Designers
- Virtual Silicon and TriCN Seal OEM Deal
- Xilinx Targets Automotive Telematics Industry with New Line of Intelligent Chips
- Rambus Announces the First 6.4 Gbps Backplane Serial Link Cell
- Chartered Joins ARM Foundry Program For Multi-core Manufacturing
- InterTrust Substantially Broadens Lawsuit Against Microsoft
- IBM, Xilinx shake up art of chip design with new custom product
Headlines for Thursday Jun. 20, 2002
Latest News- Barco Silex Image Processing Solutions Support Altera's Excalibur Devices
- ARC International Appoints New Chief Financial Officer
- Embedded memory startup T-RAM receives $35 million in funding
Headlines for Wednesday Jun. 19, 2002
Latest News- Toshiba, Fujitsu to develop SoCs, but 'may' merge units
- Atsana Integrates Virage Logic Embedded Memory System in Advanced Wireless Multimedia Processors
- Xilinx and Alcatel Broaden Ethernet Connectivity Solutions for Virtex-II Platform FPGAs
- Rambus Responds to FTC Administrative Complaint
- ARM Extends PrimeXsys Family With Introduction Of Dual Core Platform For Networking Applications
- Genesys Testware announces Bscanmaker for the simultaneous insertion of boundary scan and pad rings into a SoC
Headlines for Tuesday Jun. 18, 2002
Latest News- Altera Announces New FFT Intellectual Property Core for High-Performance Communications Applications
- Synopsys Professional Services Announces Core Hardening Service for Licensees of ARM® Soft IP Cores
- Wind River and LSI Logic extend technology partnership
- Denali Software Inc. Announces General Availability of Simulation Models For SyncFlash Memory
- Infineon, Agere Systems and Motorola Form New Company to Develop and License Digital Signal Processor Technology
- inSilicon Inks Pact with Agilent to Provide Certified Hi-Speed USB 2.0 PHY for SOC Designs
Headlines for Monday Jun. 17, 2002
Latest News- Virage Logic Improves Manufacturability and Shortens Time to Market with New Partnerships
- Xilinx Changes Programmable Logic Landscape with Expanded Virtex-II Pro Family
- Mentor Graphics Enhanced XRAY® Debugger Available Immediately For The Tensilica® Xtensa® Microprocessor
- Olympus Licenses Tensilica's Xtensa Microprocessor
- Military Robots react to Motion with IndigoVision's VideoBridge Technology
- ARC International Completes Integration of Three Subsidiaries Into One Company
- Altera's Stratix Devices Now Shipping
- TSMC 0.13-Micron Copper Process Delivers Altera's Stratix Devices In Record Time
- Agere Systems Announces Proven SONET-Compliant SERDES Sub-Circuit for ASICs
- 3DSP names Didier Boivin as new CEO and President
- Quicklogic's WebESP delivers gigabit ethernet to POS-PHY level 3 solutions
Headlines for Sunday Jun. 16, 2002
Latest NewsHeadlines for Friday Jun. 14, 2002
Latest NewsHeadlines for Thursday Jun. 13, 2002
Latest News- Wipro Technologies unveils its Bluetooth Automotive and Dial-up gateway solutions for chip vendors
- Mentor Graphics and First Silicon Solutions - FS2 - Announce Integrated Tools for MIPS 4KE Family Multi-Core Development
Headlines for Wednesday Jun. 12, 2002
Latest News- Toshiba Semiconductor and TAEC to License TiVo Technology for Inclusion in Next-Generation Chip Design
- Gigabyte Licenses Blue802™ Technology For Dual-Mode Bluetooth and Wi-Fi Wireless Solutions
- MoSys to acquire ATMOS
- NewLogic Announces First CMOS Bluetooth Radio IP Core on Independent Foundry Technology
Headlines for Tuesday Jun. 11, 2002
Latest News- Parthus Bluestream Platform To Shine At Bluetooth Congress
- Parthus To Unveil In8stream Platform At 802.11 Planet Conference In Philadelphia
- Synopsys Donates Key Verification Technologies to Accellera's SystemVerilog 3.1 Standard
- austriamicrosystems launches new 0.35um Mixed Signal Design Kits for Foundry Customers
- ARM Collaborates With Seagate For Hard Disc Drive Control
- ARC Integrates Synopsys Solutions to Dramatically Reduce 'Time-to-Volume' for ARCtangent Processor-Based Designs
- NewLogic Offers the World's First Wireless Multiband Intellectual Property Solution Supporting Bluetooth and IEEE 802.11a and b
- PACT XPP Technologies teams with Accent to offer SOC Design Services and Application Platforms for XPP-Based Solutions
Headlines for Monday Jun. 10, 2002
Latest News- SystemBIST enables system-wide Embedded Test and Programmable Logic Configuration
- Sonics-Denali Alliance Offers High Performance Memory System For Complex SOC Designs
- SynTest Expands Its Electronic Design Debugging Product Line, Introduces TurboDebug for SOC Memory-BIST Debug
- IDT Selects eInfochips' PCI-X eVC
- Virtual Silicon Names Tim Unger New CEO
- NurLogic Implements 4.8GHz Phase Locked Loop Into AMD's Eighth-Generation Processors
- IBM sets new standard for custom chip designs
- Revolutionary New Databahn Core Solves Memory Bandwidth Bottleneck for SoC Designs
- Altera and Synplicity Introduce Interface Standard for FPGA Physical Synthesis
- Altera and Mentor Graphics Enable Easy Migration of ASIC Designs to Altera FPGAs
- Philips, ARM and adelante Technologies join forces to develop a SoC platform for mobile infotainment
- Adelante Technologies licenses Mentor Graphics' embedded technology
- Adelante Technologies and Axys Design announce Saturn-Based JPEG200 virtual prototype
- Actel Enhances Designer FPGA Software
- ARC International's Soft IP Core Combines with SMSC's USB 2.0 PHY to Achive High-Speed USB Certification
- ARC International Announces USB Now™, the World's First Integrated and Optimized USB for SoC IP
- Domosys of Quebec launches its U-chip based on top performance 8051 virtual component from Dolphin Integration
- Wafer Stacking Technology Promises Faster, Denser System-On-a-Chip (SOC)
- Ericsson accredited for Bluetooth qualification
- Chartered signs deal with analog IP house Unive for SoC designs
- Trio to develop mobile entertainment SoC platform
- Chip & IP vendors get behind USB on-the-go
- CAST JPEG 2000 Encoder Core Provides Fast, Flexible Image Compression
- TransEDA’s VN-Cover Emulator Now Available for the Quickturn Palladium Design Verification System
- TriCN introduces QDR SRAM solution
Headlines for Sunday Jun. 09, 2002
Latest NewsHeadlines for Friday Jun. 07, 2002
Latest NewsHeadlines for Wednesday Jun. 05, 2002
Latest News- PTSC Retains Patent Counsel
- LogicVision Introduces Fastest Silicon Debug Saving Development Time and Resource Costs
- Silterra Launches IP Initiative
- Mentor Graphics New QuickUse IP Repository Chosen by Agere Systems
- Axis Systems' Xtreme Verification System Adopted by Sun Microsystems
- Artisan Components' Industry Standard Design Platform To Support Silterra's Advanced 0.18-Micron Process
Headlines for Tuesday Jun. 04, 2002
Latest News- Tharas Systems' Hammer hardware accelerator enhances Sun Microsystems' verification flow
- NurLogic Names William R. Peavey President And CEO
- Tality Showcases Path to Accelerate IC Design at Supercomm 2002
- Paxonet Introduces Industry’s Most Complete 10 Gigabit Transport IP Core Kit
- Tower Semiconductor and Virage Logic Announce License Agreement of NOVeA Family of Embedded Non-Volatile Memories
- 0-In Demonstrates the Value of Assertion-Based Verification (ABV) throughout the Design Cycle at the Design Automation Conference
- Globetech Solutions Joins Verisity's Verification Alliance Program
- Alvesta and Mysticom Demonstrate Very Short Reach (VSR) 10 Gigabit Ethernet Optical Solution Over Extended Fiber Distances
- USB On-the-Go Working Group Announces First Successful Interoperability Testing of USB On-the-Go Controllers
- Agere licenses BIST technology from LogicVision to reduce test costs
- X-Fab expands mixed-signal foundry portfolio with 0.35-micron process
- IP core manages SoC memory bandwidth
Headlines for Monday Jun. 03, 2002
Latest News- Aware, Inc announces availability of ADSL2 intellectual Property Solutions
- Quickturn Announces IP Program to Provide High-Speed Hardware/Software Co-Verification Environment for SoC Designs
- Atrenta to Demostrate Power of Predictive Analysis at DAC'02 in New Orleans
- Platform-based design still getting the kinks out
- TransEDA and Novas Software Team to Increase Debug Productivity for Property-Driven Verification
- TransEDA Enables Property Driven Verification Methodology with New Release of its VN-Property DX Dynamic Property Checker
- LISATek Announces New Release Of Its Unified Product Suite For Next-Generation Embedded Processor Design
- Rambus appeal hinges on disclosure rules
- Spirent Communications Selects Xilinx Virtex-II Platform FPGAs for 40G Optical Transport Analyzer
- Key Endorsements from Industry Leaders Drive Verisity's e Verification Language to Standardization
- Averant, Inc. Licenses Verisity's e Verification Language
- Momentum Builds for Assertion-Based Verification: 0-In Welcomes Averant and Bridges2Silicon as Check-In Partners
- Synopsys Redefines VCS To Deliver Smart Verification
- Barcelona Design Announces Next-Generation, High-Performance Clocking Engines
- Altera Releases Industry's First Fully Programmable SONET/SDH Solution Supporting up to OC-48 Levels
- Agere Systems Introduces Industry's Most Integrated ATM Adaptation Layer System-On-Chip for 3G Wireless Applications
- Tharas Systems extends Hammer Hardware Accelerator capacity to 128 Million Gates
- MIPS Technologies and UMC Announce Licensing and Co-Marketing Agreement
- MIPS Technologies’ 64-Bit Processor Core Powers Infineon’s New Broadband Processor Family
- LSI Logic unveils complete platform solution with low-cost, fully integrated StreamPack 24 X 2 intelligent switch
Headlines for Saturday Jun. 01, 2002
Latest News