D&R Headline News (November 2006)

Headlines for Thursday Nov. 30, 2006

Top Story

Rambus Technology is Adopted in PLAYSTATION3 Computer Entertainment System

The Rambus XDR memory interface and FlexIO processor bus account for 90% of the Cell Broadband Engine™ signal pins, enabling an unprecedented aggregate bandwidth of over 65 gigabytes-per-second in PS3.

• MOSAID Announces Second Quarter Results for Fiscal Year 2007
• German Court Finds DVD Disc Manufacturer ODS Infringes MPEG-2 Patents
• DECOMSYS Licenses FlexRay IP Proven in Freescale MFR4300 Chip From IPextreme
• Chips&Media's BodaHx5 Multi Standard HD (High Definition) decoder IP solution provides customers with superior features and high quality video for mobile and home appliance market
• ARM Strengthens Commitment To Taiwan Through Expanded Relationship With CIC
• Mentor Graphics and TSMC Provide TSMC-Qualified Process Design Kit for 0.13 micron Mixed-Mode and RF Design
• Infineon Develops Complete FlexRay Bus System for the Vehicle of the Future
• Sasken Powers Affordable Multimedia Phones on Texas Instruments ''LoCosto'' Platform
• Terawave and K-micro Partner to Deliver Industry's Highest Performance GPON 'PHY'

Headlines for Wednesday Nov. 29, 2006

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Chipidea Offers the Industry's Most Advanced Portfolio of AFE and Data Converter IP in IBM, Chartered and Samsung processes

The data converter IP was prepared on Chartered’s 90nm and 65nm technologies, part of the IBM-Samsung-Chartered Common Platform. Chipidea’s IP solutions provide SoC builders with greater flexibility to integrate data converter IP into their designs, and heralds Chipidea’s readiness to supply complete analog front-end IP in advanced technology.

• Evatronix Partners with JMicron to Deliver Total USB Solutions
• IP Cores, Inc. Announces New High-Speed IP Combo XEX-AES Family of Cores Supporting New IEEE P1619 Draft Standard
• Evatronix 8051XC Microcontroller Now Fully Supported by Keil 8051 Professional Developer’s Kit (PK 51)
• Sonics Continues Open Configuration Environment Development
• First Silicon Solutions Introduces Eclipse-Based Navigator IDE For MIPS New SOC-it Platform

Headlines for Tuesday Nov. 28, 2006

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Intrinsix Announces Availability of Tri-Mode Television IF Subsystem IP

The Tri-Mode Television IF Subsystem IP (TMTVIF), which has an Intrinsix SDM Analog to Digital Converter (ADC) at it's core, is designed to support tuners for the two major television standards worldwide: Traditional, with a High Intermediate Frequency (IF); Direct Conversion, via the Zero IF mode; as well as a third option, a Low IF mode.

• Cadence strengthens Verification Alliance program in India by adding 13 new partners
• eInfochips Introduces Rapid Prototyping Board for Texas Instruments DaVinci Technology
• Express Logic's ThreadX RTOS Gains MIPS SDE Kernel-Aware Debug Support
• Patriot Scientific Confirms Addition of Agilent Technologies to Steadily Expanding Roster of MMP Patent Portfolio Licensees

Headlines for Monday Nov. 27, 2006

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TurboConcept's WiMAX Turbo Code IP Core for LatticeSC FPGA Devices

This IP core supports all modes of the IEEE 802.16 CTC standard, including Orthogonal Frequency Division Multiplexing (OFDM) PHY and Orthogonal Frequency Division Multiple Access (OFDMA) PHY. Available in three speed versions, the typical throughput in a LatticeSC device can exceed 80 Mbits (at 5 iterations).

• Powerful Bluetooth development tool helps cut the size and cost of innovative headset for hard-of-hearing
• Clear Shape and UMC Release DFM-Driven Design Flow
• Bluespec Moves into Virtual Prototyping for Software Development, Hardware Validation
• Celoxica and EBV Elektronik Combine ESL Design with Semiconductor Supply Chain Integration
• Cochlear Limited Selects AMI Semiconductor to Co-Design and Manufacture Future Generation DSP Based System-on-Chip for Cochlear Implants

Headlines for Thursday Nov. 23, 2006

• Commentary: Lower test costs start with IC design
• IP Cores, Inc. Announces New Multi-Gigabit IP Combo AES/XEX and AES/GCM Core Supporting New IEEE P1619 Draft Standard
• ALi Corporation Adopts Ocean Blue MHEG-5 Software
• Tower Semiconductor Expands Its Previously Announced Equity Private Placement and Raises Approximately $11 Million
• Pressures tilt wireless apps toward System-in-Package (SiP)
• Embedded software execs say outsourcing is the answer

Headlines for Wednesday Nov. 22, 2006

Top Story

Saifun And Smic To Collaborate On 8GB Data Flash Using Smic's Advanced Process Technology

The development of 8Gb Data flash on SMIC’s advanced process demonstrates the advantages of Quad NROM in enabling the most cost-effective Flash manufacturing processes on the market today.

• Imagination Technology Licenses Mobile TV IP Platform to Mavrix Technology, Inc
• Sidense Joins ARM Connected Community
• Imagination Technologies Group plc -- Interim Results for the six months to 30 September 2006
• Nasdaq Grants Rambus Additional Filing Extension

Headlines for Tuesday Nov. 21, 2006

Top Story

World's First Dedicated Digital Home Entertainment Processor Utilizes Denali's Verification Software for DDR Memory Systems

Denali's MMAV IP Product Enables Verification of Memory Subsystem for CeRoma Semiconductor Digital Video Broadcasting and Internet Protocol Television Chips

• CSR announces world's first Class 1 Bluetooth silicon
• Actel's RTAX-S Device Family Hits Major Reliability Milestone
• LSI Logic Acquires Metta Technology, Inc.
• Zoran Corporation Receives NASDAQ Notice Regarding Delayed Filing of Form 10-Q
• Accent CEO, Massimo Vanzi, to give keynote speech at IP-SOC 2006

Headlines for Monday Nov. 20, 2006

Top Story

Wipro-NewLogic announces Dual Role Device MAC IP Core based on Certified Wireless USB Technology

Wipro-NewLogic’s Dual Role Device MAC IP Core can work in Limited Host mode, Device mode or simultaneous Limited Host and Device mode. It can thus be implemented as either a Device or a Dual Role Device. It is designed keeping early silicon success in mind and is optimized for performance.

• IPextreme to Accelerate Broad Adoption of Nexus 5001 Debug Standard by Making Freescale Interface Blocks Widely Available
• MOSAID Introduces SRAM IP with Industry's Lowest Leakage - Broad IP Platform Enables Fast, Low-Power, Low-Leakage Designs
• Open-Silicon Licenses MIPS32(R) 24KEc(TM) Pro Core and Virage Logic Core-Optimized IP Kit for Future ASIC Development
• Mixel Announces First Silicon-Proven Mobile Display Digital Interface Transceiver IP for Digital Handsets
• UMC Produces Working 45-nanometer ICs
• Sarnoff's 65nm CMOS TakeCharge ESD Solution licensed to Fujitsu, Japan
• Wolfson Selects Synopsys Galaxy and Discovery Platforms and DesignWare IP for Analog Mixed-signal Designs
• Faraday Introduces 533 MHz Embedded RISC CPU Core FA626 Using UMC 0.13 um Process
• Rambus India High-Speed I/O Design Team Achieves First Silicon Success; TSMC 90nm PCI Express* 2.5Gbps design fully characterized and compliant to specification
• Arasan Chip Systems Appoints Kevin Walsh Vice President of Marketing and Business Development
• OKI Selects CoWare Processor Designer For Its New Custom DSP
• Altera and White Electronic Designs Partner on Specialized Mil/Aero FPGA Packaging
• SanDisk Completes Acquisition of msystems
• Freescale's ARM9-based i.MX Applications Processor Selected for Sony's mylo(TM)

Headlines for Friday Nov. 17, 2006

Top Story

Indian semi industry creating more IP, report says

India's semiconductor and embedded design industries have not to date created a significant amount of intellectual property (IP). But that is changing as overseas companies use their R&D centers in India to develop IP either as a by-product of a specific project or purposely to feed their global IP portfolio, according to a new report.

Headlines for Thursday Nov. 16, 2006

Top Story

ARM TrustZone and Discretix CryptoCell Technologies Combined to Create Next-Generation Security for Mobile Content

Complementary technologies will be available as a complete security system; benefits include resistance to both hardware and software attacks, performance optimization and compliance with major industry standards

• Centrality Communications extends license with Imagination Technologies
• Xilinx Strengthens Industrial Networking Solutions with EtherCAT Technology
• Faraday Pioneers in Providing On-Chip Variation (OCV) Information for Cell Libraries
• VeriSilicon and MoSys Announce Collaboration to Drive Adoption of 1T-SRAM Embedded Memory Technology for Customer System-on-Chip Designs
• MIPS Technologies Receives Additional Notice from NASDAQ and Stock Options Update
• RFMD Provides Bluetooh Solution to Leading Handset Baseband Supplier

Headlines for Wednesday Nov. 15, 2006

Top Story

Chipidea Audio Codec IP Provides High Performance on Small Chip Area for Low Power Applications

The IP exhibits a unique blend of audio features, audio performance and risk-free integration for System-on-Chip (SoC) devices and multi-chip modules (McMs) targeting mobile audio, communications and multimedia systems.

• K-micro Licenses CEVA Serial Attached SCSI (SAS) PHY for Enterprise Storage Applications
• ARM Releases Free OpenMAX DL Sample Software Library
• Virage Logic and MIPS Technologies Collaborate to Offer Core-Optimized IP Kits for MIPS32(R) 24K(R), 24KE(TM) and 34K(TM) Core Families Via www.viragelogic.com
• Dust Networks Announces Network-Ready System-on-Chip Products

Headlines for Tuesday Nov. 14, 2006

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Freescale Opens Licensing of ColdFire Microcontroller Architecture to Embedded Customers

The V2 ColdFire core is available now for licensing through IPextreme Inc., semiconductor intellectual property (IP) licensing specialists. Specifically, IPextreme plans to market, sell and support the V2 ColdFire core to system-on-chip (SoC) designers seeking to integrate the core and other functions onto a single chip, helping them save time and money.

• Echelon and Altera Partner to Bring Low Cost Power Line Networking to Home Appliances
• TES and Wisair Collaborate to Deliver Ultra Wideband Solutions
• CML Microcircuits and SPIRIT DSP form a Strategic Agreement to Produce Low Bit-Rate Vocoder IC's
• Xilinx Spartan-3E FPGAs Enable JVC's Latest Professional Broadcast HDV Camera-Recorder
• Elliptic and Spinnaker Systems To Market Digital Rights Management Solutions in Japan

Headlines for Monday Nov. 13, 2006

Top Story

Xilinx Delivers Small Form Factor SDR Development Platform in Collaboration with Lyrtech and Texas Instruments

The SFF SDR Development Platform combines the industry’s first power optimization tool with miniature board size (6 inches x 5 inches) to reduce size, weight and power for mobile, handheld and SFF SDRs used in military, public safety and commercial radios.

• eSilicon Enables Mistletoe Technologies Security System on a Chip
• Cadence Aligns with IBM to Accelerate ASIC Design with Cadence Logic-Design Team Technology
• IDT And Texas Instruments Development Platform Enables Higher Performance and Faster Time to Market for 3G Wireless Base Station Designs
• TASK Micro-Electronics and Intrinsix Sign Partnership Agreement
• Abilis Systems Adopts ARC's Configurable Processor to Create Single Chip Mobile TV Receiver Solution
• TES boosts European operations with EUR 2M investment in French manufacturing plant

Headlines for Friday Nov. 10, 2006

Top Story

Thomas R. Lavelle Joins Rambus as General Counsel

Mr. Lavelle will be responsible for the overall legal direction of the Company, including securities, compliance, intellectual property, and litigation. He will report to president and chief executive officer Harold Hughes

• Broadcom Enters Applications Processor Market
• TSMC October 2006 Sales Report

Headlines for Thursday Nov. 09, 2006

Top Story

eASIC rolls 90-nm structured ASIC line

Seeking to displace FPGAs and other chip technologies in the marketplace, eASIC Corp. on Wednesday (Nov. 8) came out of its shell with a bang by unveiling a new 90-nm structured ASIC line.

• ARM Extends Approved Design Center Program With Software Specialist Category
• IPextreme to Sell Cypress Semiconductor's USB 2.0 Low-Power Hub IP
• IP plays cautiously in emerging markets
• Broadcom Announces the Industry's First Complete Blu-ray/HD DVD System-on-a-Chip Solution for Media Player Development
• Cypress Teams With Winbond To Introduce Demonstration Kit For 2.4-GHz Wireless VoIP Headset With Best-In-Class Range And Performance

Headlines for Wednesday Nov. 08, 2006

Top Story

VSIA Publicly Releases Updated Hard and Soft IP Tagging Standards; Freescale donates tag reader/writer to VSIA

The VSIA Hard IP and Soft IP Tagging standards are products of the organizations’ IP Protection (IPP) Pillar. These standards allow for designers to retain IP core information throughout the entire design process and ensure proper versions of the core have been integrated into the design.

• Chipworks First Inside Xilinx Virtex-5 FPGA 65nm ''Twins''
• Next-Generation FlowThrough Security Processors Successfully Employs Denali DDR Controller IP
• UMC Delivers Leading-edge 65nm FPGAs to Xilinx
• Altera Announces High-End Stratix III Family
• Gaisler Research develops LEON instruction simulator with real time performance
• Texas Instruments Executive Appointed as MOSAID's Senior Vice President of Patent Licensing and General Counsel

Headlines for Tuesday Nov. 07, 2006

Top Story

Faraday Launches Universal Programmable SerDes IP

The high-performance interface solution is designed to meet industry requirements in terms of reduced die sizes and significant power savings, which further leads the customers to a more competitive and advantageous market position.

• PLDA and Silica Strike pan-Eurpean IP Distribution Agreement
• Virage Logic Reports Fiscal Year and Fourth-Quarter 2006 Results
• TSMC Board Approves Capital Appropriation for 65nm and 90nm Capacity
• VSIA Kicks Off IP Encryption Workgroup With First Open Meeting

Headlines for Monday Nov. 06, 2006

Top Story

Handshake Solutions empowers 80% of ePassports globally

Clockless technology offers the ideal answers for the specific requirements of secure ePassports, eVisas and national ID cards. A controller based on Handshake Technology can easily support the large non-volatile memories required to store biometric data such as fingerprints and a digital image while also incorporating essential cryptographic security features – all within the limited power budget available.

• Arasan Chip Systems licenses its USB OTG Core to Networking Giant
• Ikanos Selects Virage Logic as Trusted IP Partner, Inks Three-Year Full Access Deal
• Texas Instruments Selects MIPS32(R) 24Kc(TM) Processor Core for Low-Power IP Phone Solution
• Wipro's IEEE 1394 Intellectual Property Cores family completes a decade - is widely deployed in digital devices today
• Western Design Center Joins ispLeverCORE Connection Partners Program, Optimizes 8-bit 65xx Microprocessor IP Core for LatticeXP FPGA Devices
• Actel and Aldec Partner to Offer High-Reliability Design Solutions for Aerospace and Avionics Markets
• Tower Semiconductor Launches 0.18-Micron High-Voltage Technology
• NVIDIA to Acquire PortalPlayer
• Evatronix to host technical seminars at the company stand during Electronica 2006
• 65 nm: Where are the chips?

Headlines for Friday Nov. 03, 2006

• Commentary: Why it's time to redefine ESL
• Experts: design offshoring yielding mixed results
• Xilinx Appoints Executive VP & General Manager to Lead Advanced Platforms Group
• GDA Technologies Accepted into TSMC's Design Center Alliance Program
• Wind River to Support Sun's Breakthrough UltraSPARC T1 Multithreaded Next-Generation Processor

Headlines for Thursday Nov. 02, 2006

Top Story

Six New IP Providers Join Cadence OpenChoice; Expand IP Program to Enhance the Design Chain Ecosystem

ChipIdea, Fabbrix, GDA, Ingot, Intelliprop and IPextreme Become OpenChoice Members to Simplify the Process of IP Integration Into Customer Designs

• Xilinx Announces Availability of Complete Logic Design Solution for Newest Virtex-5 LXT Platform
• Tower Semiconductor Begins Production of UXGA (Two-Mega-Pixel) and VGA Image Sensors for SuperPix of China

Headlines for Wednesday Nov. 01, 2006

Top Story

Embedded FPGA to reach 65-nm in 2007, says M2000

Claiming to be already delivering the densest embedded FPGA (eFPGA) at the 90-nanometer manufacturing node, M2000 SA is in the process of preparing FPGA intellectual property targeting 65-nanometer designs. The first 65-nm tapeout is expected during the first half of 2007, the company said.

• Silicon Logic Engineering Adds High-End FPGA Design Services
• Lattice and IntelliProp Announce Partnership and CE-ATA Core Availability
• Analysis: BDTI's ARM1176 benchmark scores
• EONIC BV and Gaisler Research AB signs license agreement for LEON3 multiprocessor
• ARM drawn into lawsuit with processor technology licensor
• ARC CEO: 'Impatient capital' hinders U.S. IC industry
• Xilinx Establishes US $75M Venture Fund to Drive Innovation and Development in Asia Pacific
• Intellitech Announces Support and Technology Center in Bangalore with IEEE 1149.1/JTAG Test Services