D&R Headline News (November 2007)

Headlines for Thursday Nov. 29, 2007

Top Story

Great River Technology Licenses PLDA EZ DMA IP Core for Use in its Matrix PCIe4 High Speed Video Boards

PLDA, the industry leader in the high-speed bus IP market, today announced that Great River Technology has licensed PLDA’s EZ DMA IP core for Xilinx® 65nm Virtex™-5 FPGAs. The PLDA core will be integrated into Great River Technology’s MATRIX PCIe4 high speed ARINC 818 video card for the avionics industry.

• Certicom Licenses Elliptic Curve Cryptography to IdentiPHI for Advanced Enterprise Security and Suite B Compliance
• Atmel and Fraunhofer IIS Announce Collaboration for Systems-on-Chip based on Atmel's AT91CAP Customizable Microcontroller
• BAE Systems signs agreement with Achronix to develop high-performance radiation-hardened reconfigurable FPGA

Headlines for Wednesday Nov. 28, 2007

Top Story

Rambus Unveils Ground-breaking Terabyte Bandwidth Initiative

This technology initiative includes the development of new memory signaling innovations that will facilitate blazing fast data rates of 16Gbps and enable a future memory architecture that can deliver an unprecedented terabyte per second (TB/s) of memory bandwidth (1 terabyte = 1,024 gigabytes) to a single System-on-Chip (SoC)

• DS2 Licenses Tensilica's Xtensa Processor for 200 Mbps Powerline Chipset
• MOSAID Announces Second Quarter Results for Fiscal 2008 and Dividend

Headlines for Tuesday Nov. 27, 2007

Top Story

Faraday Introduces The ARMv5 Compliant Ultra Low Power Core -- FA606TE

Faraday today launched the ARM v5 instruction set architecture (ISA) compliant processor - FA606TE, which is an ultra low power 32-bit RISC with the synthesizable and configurable features

• Sony Selects Denali PureSpec PCI Express Verification IP for SxS PRO Memory Card
• Toshiba and NEC Electronics Announce Joint Development of 32-nanometer System LSI Process Technology
• Imagination Technologies Group plc: Interim profits and strong strategic progress
• MIPS Technologies Joins the Multicore Association to Drive Standards for Next-Generation Embedded Designs
• NetLogic Microsystems and TSMC Collaborate on Industry-Leading 55nm Technology for Advanced Low-Power Knowledge-based Processors
• New partner for OpenCores.org
• eSilicon Ramps 65Nm Design Engagements With Multiple Customers

Headlines for Monday Nov. 26, 2007

Top Story

Synopsys' DesignWare IP Passes Certified Wireless USB Testing From USB-IF

The DesignWare Wireless USB Device IP is designed to the WiMedia Alliance Ultra-wideband (UWB) Common Radio Platform and includes a WiMedia MAC-PHY interface for interoperability with WiMedia UWB PHYs such as those from Alereon and Realtek

• Altera's New Nios II Embedded Evaluation Kit Showcases Unique FPGA Design Capabilities For Embedded Systems
• eASIC and Tensilica Partnership Delivers Free Diamond Processors on Free Mask Charge ASICs
• Xilinx and Brilliant Telecommunications Announce Industry's First Carrier-Class FPGA-Based Network Timing Solution for Next Generation Wired & Wireless Networks
• Sequans Provides Chips to USI to Develop Mobile WiMAX End User Devices and System-in-Package (SIP) Modules
• Synplicity Joins Xilinx ESL Design Ecosystem
• Noesis Technologies Announces its Compact Area Parameterizable Reed Solomon Decoder and Encoder IP Core
• Safety-conscious automakers push IC system-level approach
• Federal Judge Affirms Jury Verdict that Qualcomm Infringes Three Broadcom Patents
• On2 Technologies and Texas Instruments Collaborate on Video Devices Providing Optimized Codec Performance

Headlines for Wednesday Nov. 21, 2007

Top Story

Product Announcement: RealView Platform Baseboard for ARM11 MPCore Multiprocessor Available

The Platform Baseboard for the ARM11 MPCore multiprocessor is especially designed for symmetric multiprocessing applications development at near real time speed. It consists of a test chip ASIC containing four ARM11 MPCore multiprocessors and Level2 cache running at 200 Megahertz, and a memory system on a structured ASIC containing all the speed critical peripherals commonly seen in embedded systems running at 100 Megahertz.

Headlines for Tuesday Nov. 20, 2007

Top Story

ARC Introduces the IP Industry's Lowest Power MP3 Solution

ARC International today announced an optimized MP3 decoder for its ARC® Sound Subsystem operating at under 7 MHz and dissipating less than 0.46 mW of power in a TSMC 90 G process.

• CoWare and Tensilica Integrate Diamond Standard 106Micro with CoWare ESL 2.0 Technology
• Arithmatica Releases Major Updates to Datapath Synthesis Tools and Intellectual Property
• ARC Announces The IP Industry's Lowest Power MP3 Solution and Embedded Linux for Home Media Servers and Converged Mobile Handsets
• NEC Electronics Introduces 40-nanometer Embedded DRAM (eDRAM) Technologies
• Arasan Chip Systems Appoints New Vice President of Marketing

Headlines for Monday Nov. 19, 2007

Top Story

CEVA and ROHM Partner for Bluetooth 2.0+EDR Reference Design Platform

Addressing the burgeoning Bluetooth market, the combined reference design integrates ROHM's 2.0+EDR Radio with CEVA's Bluetooth 2.0+EDR baseband and protocol stack IP for a high-performance, low-power Bluetooth 2.0+EDR platform.

• Renesas Technology Deploys CEVA Bluetooth IP in High Volume Consumer and Automotive Chipsets
• Actel Libero IDE v8.1 Maximizes Power Efficiency with New Power-Driven Layout and Advanced Power Analysis
• Horizon Semiconductors sets in motion next generation location-free universal HD-DVD/Blu-Ray decoder/transcoder SoC
• CSR Bluetooth enabled MP3 player design for low cost differentiation

Headlines for Friday Nov. 16, 2007

Top Story

MoSys Introduces SATA II IP for Storage, Network Storage and Connectivity Markets

The MoSys SATA GEN II (3.0Gbs) PHY IP is compliant with Serial ATA II Electrical Specification Revision 2.5 and is backward compatible to the widely deployed Gen I (1.5GbS) Serial ATA standard.

• Kaben Wireless Silicon Joins the IBM Business Partner Network
• TEAC Corporation Purchases Moore Microprocessor Patent Portfolio License

Headlines for Thursday Nov. 15, 2007

Top Story

Sonics Extends GALS Support for Advanced Power Management

SonicsExpress enables developers to extend the globally asynchronous locally synchronous (GALS) capabilities of Sonics SMART Interconnect solutions, while maintaining automated system level verification and ultra-low power consumption.

• Zilog(R) Integrates Real-Time Virtualization(TM) Technology From VirtualLogix(TM) to Create Potent 32-Bit Security Solution for Point-Of-Sale Market
• ARC Rides Embedded Linux Wave into Home Media Servers and Converged Mobile Handsets

Headlines for Wednesday Nov. 14, 2007

Top Story

Xilinx Launches New Comprehensive Embedded Processing Platform

Anchored by an enhanced 32-128 bit Processor Local Bus (PLB) the platform delivers increased performance and scalability for future performance and feature requirements from Xilinx. The MicroBlaze(TM) 32-bit processor now includes the industry's only configurable Memory Management Unit (MMU) that enables commercial-grade operating system (OS) support and is supported by a host of upgraded IP and design tools delivered with the Embedded Development Kit (EDK) version 9.2.

• Innovision launches Gem Near Field Communication IP evaluation and licensing programme
• Phylinks Announces Working-First-Silicon for PHY-820: PCIe PHY with Leading-Edge DFT Features
• Chartered, Socle Offer ARM926EJ Development Kit For 65nm Low Power Process
• Freescale Semiconductor Completes The SPIRIT Consortium Board of Directors
• First Fully Programmable High Definition H.264 Video Solution Demonstrated by AllGo Systems and Silicon Hive
• MindTree Consulting Acquires TES-Purple Vision
• Qualcomm Makes First Call with Chips Using TSMC's 45nm Technology
• NI and Collaborators Deliver New IP to Simplify FPGA Development
• Virtutech Accelerates and Streamlines Development of Applications for Next-Generation of IBM PowerPC Processor Cores
• Echelon and Altera Collaborate to Enable More Powerful, Multi-Purpose Controllers for Control Automation Market

Headlines for Tuesday Nov. 13, 2007

Top Story

Silicon Hive announces HiveFlex VSP 2500 World's first fully-programmable multi-processor solution for Full High Definition (1080p) video codecs

Silicon Hive announces the HiveFlex VSP 2500 Video Signal Processing solution for Full High Definition (HD) video codecs. It is the world’s first fully-programmable video coding solution for Full HD (1080p).

• Altera and Synopsys Collaborate to Make Nios II Processor Core Available for ASIC Designs
• Global Unichip Selects Vivante Graphics Solutions for Mobile System On Chip
• Sidense Achieves Working Embedded OTP at 65nm
• DTS Audio Technologies for Blu-ray Disc and HD DVD to be Added to Tensilica's HiFi 2 Audio Engine
• RF Engines Ltd (RFEL) announces new CORDIC IP design
• ARM Introduces SecurCore SC300 Processor For Smart Card Applications
• Toshiba Delivers DFI-Compatible DDR PHY to Speed Custom SoC Memory System Designs
• SRC Selects Altera for Next Generation MAP Processor
• Actel Delivers Industry's First 4x4 mm Package For Programmable Logic Devices

Headlines for Monday Nov. 12, 2007

Top Story

Menta unveils the second generation of its embedded-FPGA (eFPGA) IP

The Menta’s eFPGA IP is a customizable domain-specific programmable core made with dedicated Look-Up-Tables (LUT), and according to the targeted applications, some additional hard macro blocks (multiplier, memory…) can be plugged inside the core to increase speed, reduce power and area.

• Low-cost platform opens new market opportunities for Wi-Fi devices
• Carbon Design Systems Adds Support for Latest Version of ARM Tools
• Temento Launches an Innovative Business Model for Its 'Dialite' Debug Platform
• Xilinx Announces Commercial Availability of First Front Side Bus FPGA High Performance Computing Solution for Intel(R) Xeon(R) 7300 Series Platforms
• Netronome Announces Licensing Agreement fro High-End Network Processor Technology

Headlines for Friday Nov. 09, 2007

• Pentek's New Digital Transceiver with Multiband DDC Core and Interpolation Filter Supports all Communication Bandwidths
• TSMC October 2007 Sales Report
• Dolby Laboratories to Acquire Coding Technologies
• MoSys Announces That Semiconductor Industry Veteran Len Perham Joins as New Chief Executive Officer

Headlines for Thursday Nov. 08, 2007

Top Story

Rambus Signs Memorandum of Understanding with Intel

Rambus Inc., one of the world's premier technology licensing companies specializing in high-speed memory architectures, has signed a memorandum of understanding with Intel to explore possible uses for Rambus' family of XDR™ memory solutions.

• MIPS Technologies Reports First Quarter Fiscal 2008 Financial Results
• Ireland's Duolog flips to an EDA business model
• Renesas Technology Completes Design of CPU Core for Next-Generation Microcontrollers, and introduces details of 'RX Family'
• Transmeta Reports Third Quarter 2007 Results

Headlines for Wednesday Nov. 07, 2007

Top Story

Microtronix Announces Video LVDS SerDes IP Core for HDTV Applications

Microtronix® today announced the launch of the Video LVDS SerDes Transmitter / Receiver IP Core targeted at the burgeoning high resolution 1080p 100/120 LCD panel display systems.

• TranSwitch Introduces High-Definition Multimedia Interface IP Cores for Digital Video and Audio Applications
• ARM Gives Thumbs Up For On2's Video Codec Solutions
• IP Cores, Inc. Ships a Multi-Gigabit Combo AES/XTS, AES/CBC and AES/GCM IP Core for Attached Storage Applications
• Microchip Technology Chooses Industry-Leading MIPS32 Architecture for Entrance into 32-bit Microcontroller Market
• Tower Semiconductor Reports 28 Percent Revenue Growth for First Nine Months of 2007
• Wi-LAN Enters License Agreement with Matsushita Electric Matsushita licenses Wi-LAN technology for use in Panasonic computers

Headlines for Tuesday Nov. 06, 2007

Top Story

VeriSilicon Holdings Co., Ltd. Secures $20 Million in Financing

VeriSilicon Holdings Co., Ltd., a System-on-A-Chip (SoC) platform based integrated circuit design foundry, today announced that it raised US$20 million in its Series D financing, bringing the total amount of venture funding received to US$58 million since the company's inception in 2001.

• Kilopass and Certicom Partner to Deliver Comprehensive Security for High-Bandwidth Digital Content Protection
• Innovative Silicon Secures $25M in Series C Funding
• Synopsys Selected to Develop 45-Nanometer USB PHY IP for IBM Foundry Process
• Sigma Designs Selects MIPS(R) Cores for Next Generation Home Entertainment SoCs
• NetEffect Adopts Denali's PCI Express 2.0 and IO Virtualization Technology Solutions
• Xilinx Demonstrates Spartan-3 FPGA-based Machine Vision Solution at Vision 2007
• Development Tool from STMicroelectronics Opens Performance Monitoring Window on New STM32 ARM Cortex-M3 core-based Microcontrollers
• e2v adopts EdXact's Jivaro tools

Headlines for Monday Nov. 05, 2007

Top Story

Synopsys DesignWare IP for 5.0 Gbps PCI Express Enables First-Pass Silicon Success for PMC-Sierra's High-Performance SoC

Synopsys today announced that PMC-Sierra was able to achieve first-pass silicon success for their high-performance design using Synopsys' DesignWare® Bridge IP for PCI Express 2.0 (Gen II) to ARM® AMBA® 3 AXI(TM) and the DesignWare interconnect fabric for AMBA 3 AXI. The DesignWare Bridge IP for PCI Express 2.0 to AMBA 3 AXI operating at 5.0 Gbps, is the first PCI Express 2.0 IP solution to achieve silicon success.

• Mixel Announces Tape-out of the First Complete MIPI D-PHY IP for Mobile Applications
• Aragio Solutions Offers Suite of Programmable GPIO I/O Libraries Supporting 65nm Common Platform Technology Available for Chartered Customers
• CoWare Introduces First ESL 2.0 Technology Release for the Design of Processor- and Software-Intensive Electronic Platforms
• Tensilica Unveils Diamond Standard 106Micro Processor; Smallest Licensable 32-bit Core
• S3 Opens Design Center in Silicon Valley
• Tensilica Enhances Entire Diamond Standard Processor Core Family, Offers New Features and Memory Power Reductions Up to 30 Percent
• Mentor Graphics and Avery Design Team to Deliver Comprehensive PCI Express and Serial ATA IP Solutions
• Xilinx and Thales to Demonstrate Partially Reconfigurable FPGA-Based Architecture at Software Defined Radio Technical Conference
• Tallika announces customer success with ServerEngines, LLC
• Avnet ASIC Israel and Elliptic Partner to Offer Security Solutions to Israeli Customer
• Nokia and STMicroelectronics close the agreement in 3G chipset development
• Synplicity and Lattice Expand Partnership to Include DSP Synthesis
• Alvaview announces High quality, Low-power Multi-format codec design for Mobile Video Devices
• Noesis Technologies Releases DVB-H Reed Solomon Decoder
• Nanoscale chip verification: a massively analog problem?

Headlines for Friday Nov. 02, 2007

Top Story

Cosmic Circuits announces its WiMO AFE platform for MIMO WiFi and WiMax SoCs

The AFE platform consists of a dual matched ADC (IQ-ADC), dual matched DAC (IQ-DAC), an auxiliary ADC and DAC for monitoring and control, and a versatile PLL, suitable for portable mobile applications. At low power levels for the receive channel, and with a fast wake-up from standby, it helps extend battery life in portable applications.

• Verification Library Accelerates OCP System Designs
• Silicon Image Licenses Impinj's AEON/MTP Nonvolatile Memory for High-Volume Consumer Electronics and Computing Chips
• On2 Technologies Completes Business Combination with Hantro Products
• Imagination Technologies Licenses POWERVR IP Cores to SigmaTel

Headlines for Thursday Nov. 01, 2007

Top Story

SD/SDIO/MMC Slave Controller IP Core Enables High Performance SD and MMC Card Design

Eureka Technology today announces the immediate availability of SD/SDIO/MMC slave controller core that supports Secure Digital (SD) and Multi-Media Card (MMC). Eureka has provided SD and MMC IP cores to many licensees since 2004. This latest addition of the slave controller completes the product line. A hardware development board for SD/SDIO/MMC development will also be available soon.

• Imagination Technologies' Multi-Standard Receiver IP CORE Family Extends Support to 1SEG, 3SEG and Full-SEG ISDB-T
• MoSys Introduces the First in a Family of Gigabit Ethernet Intellectual Property for ICs
• CEVA, Inc. Reports Third Quarter 2007 Financial Results
• Rambus Reports Third Quarter Earnings
• Wi-LAN Initiates Litigation for Patent Infringement