D&R Headline News (March 2008)

Headlines for Monday Mar. 31, 2008

Top Story

XDR(TM) DRAM Passes 50 Million Units Shipped Milestone

Rambus today announced that its customers have shipped over 50 million XDR DRAM devices worldwide.

• More configurations for the audio CODEC from Dolphin Integration proven with 100 dB
• Garmin licenses S3's onHandTV Mobile TV Software
• EVE in the Systems Prototyping Garden
• STMicroelectronics, Intel and Francisco Partners Close Transaction to Create Numonyx
• Tensilica's New GUI Helps Cut Chip Energy Consumption
• Express Logic and IAR Systems Team Up to Provide ThreadX RTOS Support in IAR Embedded Workbench IDE for Freescale ColdFire
• ARC and Toshiba Extend Collaboration to Develop Next Generation Multicore Configurable Processor Technology
• ANSYS, Inc. Signs Definitive Agreement to Acquire Ansoft Corporation
• Synopsys Extends Design Compiler Topographical Technology to Predict and Alleviate Routing Congestion
• Virtutech Presents Simics 4.0, First Deterministic Multithreading VSD Platform

Headlines for Friday Mar. 28, 2008

• Wi-LAN and Zonet Sign Wi-Fi License Agreement

Headlines for Thursday Mar. 27, 2008

Top Story

Rambus Wins Coordinated Trial Against Memory Manufacturers

Rambus today announced that the jury in the case involving Hynix Semiconductor, Micron Technologies, and Nanya Technology Corporation has found in favor of Rambus.

• Nabil Takla, Innovative Semi CEO, hatches incubator fund for Asia, eastern Europe
• Mentor Graphics Expands Questa Functional Verification Platform with Questa Codelink for Processor-Driven Tests
• Denali's Blueprint Employed by Atheros to Enhance SoC Design Productivity and Enable Rapid IP Reusability
• Tower Semiconductor Ramps-Up Production of N-trig's Digitizer Chips
• Analysis: On2 brings YouTube to cell phones

Headlines for Wednesday Mar. 26, 2008

Top Story

ViASIC Technology Enables First Proven Two-Week Turnaround from Tapeout to Production for ASICs

Sandia National Laboratories demonstrated this rapid turn-around for radiation-hardened (rad-hard) designs, using its ViArray trusted structured ASIC implementation platform based on ViASIC’s patented standard metal configurable fabric and Sandia’s radiation-hardened technology.

• CoWare and Sonics Release ESL 2.0 Upgrade of Joint Flow
• Elliptic Adds New Board Member

Headlines for Tuesday Mar. 25, 2008

Top Story

Arasan Chip Systems Completes UNH Gigabit Ethernet Interoperability Testing

Arasan announced today that its silicon proven Gigabit Ethernet IP solution has completed interoperability testing at the University of New Hampshire's Interoperability Lab (UNH IOL).

• QuickLogic Speeds Hard Disk Drive Transfers With New Proven System Block
• Altera's Low-Power Cyclone III FPGAs Deliver Highest Integration for Portable Applications
• eASIC Enables AVTECH to Reduce IP Surveillance Camera Cost by 45%
• VaST and Tensilica to Deliver High-performance Models Supporting Electronics Virtualization for Consumer Electronics OEMs
• Hua Hong NEC Completes 0.13-Micron NVM Technology License From Cypress
• From seeds to ASICs: Wipro's journey typical of India's design industry

Headlines for Monday Mar. 24, 2008

Top Story

TSMC First to Deliver 40nm Process Technology

The new node supports a performance-driven general purpose (40G) technology and a power-efficient low power (40LP) technology. It features a full design service package and a design ecosystem that covers verified third party IP, third party EDA tools, TSMC-generated SPICE models and foundation IPs. First wafers out are expected in the second quarter of 2008

• NSCore Contracts with K-micro to License Logic-Nonvolatile-Memory IP
• Xilinx Delivers Complete Design Tools Suite - Providing Breakthrough Improvements in Productivity, Performance & Power
• NXP Signs Corporate-wide Agreement to Embed Numetrics Tools in Product Planning Processes
• Numetrics Unveils NMX-ERP 3.0, Next Generation ERP Software for Semiconductor IC Development Organizations
• Toric, a semiconductor IP licensing company specialising in jitter suppression and high-speed clock generation technology, appoints Ian Walsh as VP of Business Development
• Altera FPGA Employed in EONIC's Electronic Warfare System
• The MathWorks Expands Product Portfolio for Electronic System Verification
• Sun Microsystems Awarded $44 Million Department of Defense Contract to Develop Microchip Interconnect System
• Stretch and IntelliVision to Release Advanced Video Analytics on the Stretch S6000 Family of Software Configurable Processors

Headlines for Friday Mar. 21, 2008

• Broadcom Demonstrates Industry's First Single-Chip High Definition Set-Top Box Solution With China AVS Support

Headlines for Thursday Mar. 20, 2008

Top Story

Synopsys to Acquire Synplicity, Inc.

Under the terms of the agreement, Synopsys will pay $8 cash per Synplicity share, resulting in a gross transaction of approximately $227 million, and approximately $188 million net of cash acquired

• TaraCom Integrated Products and GDA Technologies Enter into Partnership to Combine Their GPON SerDes Phy IP and MAC Developed for System Designs
• Spiral Gateway announces working test chip

Headlines for Wednesday Mar. 19, 2008

Top Story

Altera and Bitec Deliver Platform for Next-Generation Video System Development

At the heart of the kit are Altera’s Cyclone® III FPGAs, which are an ideal video processing platform given the device’s large parallel processing capabilities with up to 288 multipliers, 4-Mbit embedded memory blocks, and low power consumption.

• K-micro SAS IP core powers new generation of Tandberg Data tape drives
• Imagination Technologies Group PLC - Interim Management Statement

Headlines for Tuesday Mar. 18, 2008

Top Story

Mentor Graphics New Version of Platform Express Supports IP-XACT 1.4 Specification from The SPIRIT Consortium

Mentor Graphics today announced the immediate availability of a new version of Platform Express™ with full support for the IP-XACT 1.4 IP databook specification, new mixed-level RTL and ESL design capabilities, and a new portable generator format.

• eASIC Corporation Announces a Landmark Program Aimed at Ushering in an Era of Affordable Silicon Customization
• Spansion Inc. Closes Acquisition of Saifun Semiconductors
• MIPS Technologies Appoints Maury Austin as Chief Financial Officer
• ON Semiconductor Delivers Structured ASIC Technology for Military and Aerospace SoCs and FPGA-to-ASIC Conversions
• Transmeta Reports Fourth Quarter and Fiscal 2007 Results

Headlines for Monday Mar. 17, 2008

Top Story

Silvus Technologies and Ittiam Systems Announce Partnership to Provide 802.11n PHY/MAC IP Solution for Highest Wi-Fi Throughput and Extended Range

The new offering will include Silvus' 802.11n PHY and Ittiam's 802.11n MAC. Highlights for this new joint offering include 20 MHZ and 40 MHz advanced MIMO modes and a 600 Mbps full throughput Media Access Controller (MAC) which is IEEE 802.11n draft 2.0 compliant.

• Altair Semiconductor Integrates MIPS Technologies' Analog and Processor IP in Ultra Low-power Mobile WiMAX Processor
• Xilinx Delivers Complete Virtex-5 FPGA Solution for XAUI Protocol
• VaST and NEC Electronics America Develop Models of V850-Based Microcontrollers for Leading Automotive Customers
• Actel Ices Competition With New Low-Power, I/O-Optimized FPGA Family
• ZTE Leverages Altera Stratix II FPGAs to Deliver New TD-SCDMA Remote Radio Unit
• UMC and Elpida Partner to Serve Japan-based Foundry Customers
• Staccato Delivers Certified Wireless USB Native Device Development Kit
• Synopsys IC Compiler Routing Qualifies for TSMC's 45-Nanometer Process
• FPGAs help drive automation
• MIPS vs. Intel Atom

Headlines for Thursday Mar. 13, 2008

Top Story

eASIC Raises $48 Million in Latest Financing Round

eASIC today announced it has raised $48M in late stage financing. The financing round was lead by Advanced Equities Incorporated.

• Tokyo Electron Device Announces New Virtex-5 FPGA LX330 Evaluation Platform For ASIC Prototyping
• Tensilica Becomes First Processor IP Company to Support MPEG-4 AAC-LC and aacPlus Multi-Channel Decoders for 7.1 Surround Sound
• IP Adventures in EDA
• ARM Extends Design Center In India

Headlines for Wednesday Mar. 12, 2008

Top Story

MIPS Technologies Offers Silicon-Proven Hi-Fi Quality Audio IP in Deep Submicron Processes

MIPS Technologies today announced that its 96dB Audio IP Codec -- already silicon-proven in multiple deep submicron processes and foundries -- has been silicon-proven in TSMC 90nm and Chartered Semiconductor Manufacturing 130nm processes.

• Dialog Semiconductor Licenses ARM Processor for Next-Generation 42V Automotive Battery Sensing Products
• ChipX Simplifies DDR2 Design With Industry Standard DDR PHY Interface v2.0
• Electronics Industry Embraces Synplicity's Confirma Platform for ASIC Verification

Headlines for Tuesday Mar. 11, 2008

Top Story

New ARC Energy PRO Core Family Slashes Power Consumption By Up to 75%

The ARC® Energy PRO™ core family leverages the company's recently announced, ultra low power Energy PRO technology to set new standards for low power consumption by reducing power usage by up to 75 percent

• Arasan Chip Systems Releases Gigabit Ethernet Driver Source and Verification IP Package
• Tensilica's Xtensa Processors Enable Next-Generation Mobile HD Radio Technology
• Coresonic announces the first of its wireless modem hardware solutions with WiMax 'personality pack' enabling quick addition of IEEE802.16
• ARC Introduces the World's First "Sonic Focus-Ready" Audio Subsystem, Setting New Standards for Sound Fidelity And Energy Efficiency

Headlines for Monday Mar. 10, 2008

Top Story

CEVA and NBICC Collaborate to Add China's AVS Video Standard to Portfolio of Audio/Video Codecs for CEVA's MM2000 Platform

CEVA's fully programmable, multi-standard multimedia platform now supports H.264, MPEG4, DivX, RealVideo, H.263, VC-1 and AVS video codecs

• CEVA and HuaXun Partner to Deliver Software GPS Solution for CEVA-X DSP Cores and MM2000 Multimedia Platform
• Actel Fusion PSC Delivers Highest Accuracy for Intelligent System Management and Industrial Control
• New IP-XACT Specification to Aid Design and Advanced Verification
• IBM and Hitachi Form Research Collaboration to Study Chip Characteristics at Near Atomic Scale
• Axilica Offers tool for behavioral synthesis of hardware designs from UML
• Synopsys Announces Multi-Core Initiative to Accelerate Design Time-To-Results
• ProDesign Launches the CHIPit Iridium Prototyping Suite
• Virtutech Announces Initiative to Further Advance Standards for Virtualized Software Development
• TSMC February 2008 Sales Report

Headlines for Friday Mar. 07, 2008

Top Story

CAST Expands System IP Offerings with Embedded Internet and USB Subsystems

The two new system IP products combine IP cores for an 8051 processor with an Ethernet MAC controller core and with a hi-speed USB 2.0 device controller core. Verified TCP/IP and USB software stacks are also included, and a development board is available for each subsystem.

• SiliconBlue 65-nm FPGAs run on microamps
• Gaisler Research has increased its number of scientific FPGA designs in Earth orbit
• Faraday Monthly Sales Report -- February 2008

Headlines for Thursday Mar. 06, 2008

Top Story

EVE Unveils ZeBu-Personal Emulator

ZeBu-Personal shortens time to tapeout, improves product quality and eliminates costly respins, while accelerating software development ahead of silicon.

• Netronome Systems Standardizes on Denali Software Design IP to Accelerate Design Cycles and Reduce Risks
• Jade Tech Announces multimedia SoC designed for portable and embedded application

Headlines for Wednesday Mar. 05, 2008

Top Story

Sidense Raises $6 Million in Venture Capital to Expand Global Reach

Sidense announced today that it has raised $6 million in a venture capital financing round co-led by Vertex Venture Capital, a leading Israeli venture capital firm, and Tech Capital Partners of Waterloo, Canada.

• Synopsys Enters Embedded Memory Market With Highly Differentiated IP
• intoPIX announces a real-time JPEG 2000 4K Encoder
• Certess Announces Broad Adoption of its Functional Qualification Solution by STMicroelectronics

Headlines for Tuesday Mar. 04, 2008

Top Story

Xilinx Accelerates Development of SFI-5 Applications With Hardware-Verified Solutions

Xilinx today announced availability of a free hardware-verified reference design and 3rd party IP for the optical internetworking forum (OIF) SERDES framer interface level 5 (SFI-5) standard.

• eASIC Integrates Front-End from Interra to Accelerate Deployment of Nextreme Structured ASICs
• WiLinx Licenses Tensilica's Xtensa LX2 Processor Core For Low-Power UWB Chips
• OCP-IP Unveils CoreCreator II

Headlines for Monday Mar. 03, 2008

Top Story

Faraday and Mixel Announce IP Development and Licensing Partnership

Mixel is licensing its high performance LVDS De-Serializer transceiver IP to Faraday for use in their customer ASIC designs. The IP is designed in UMC 90nm process technology. This is intended to be the first of many IP development collaboration between Faraday and Mixel.

• Silvus Technologies Announces Commercial Availability of 802.11n PHY IP Solution
• ARC Helps STEC's New MACH4 Compact Flash Capture HD Multimedia Content at Twice the Speed Of Competitive Offerings
• OCP-IP Announces Part 1 of Network On Chip Benchmarking Specification
• Imperas Unleashes Open Source Initiative to Establish Common, Open Standard for Multicore SoC Design
• Convergence of Graphics, Video and GPS to Drive Next Generation Personal Navigation Devices
• ViASIC Names J. Mark Goode as President and Chief Executive Officer
• Tensilica and NuFront to Show T-MMB Mobile TV Solution at China's IIC 2008 Shows