D&R Headline News (November 2008)

Headlines for Thursday Nov. 27, 2008

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German processor firm alleges Xilinx, Avnet infringe patents

Pact XPP, a developer of a reconfigurable highly parallel processor architecture, has filed a law suit against FPGA vendor Xilinx Inc. and distributor Avnet Inc. in the Eastern District court of Texas, claiming patent infringement.

Headlines for Wednesday Nov. 26, 2008

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Surrey Satellite Technology Ltd Licenses CAN Controller IP from Inicore Inc.

Inicore Inc. announced today that Surrey Satellite Technology Limited in Guildford, UK, has licensed its Controller Area Network Intellectual Property core CANmodule-IIx for their new SGR-05P range of space-borne GPS receivers.

• eMemory 0.13um OTP Used in LCD Driver Mass Production at TSMC
• Cavium Networks Signs Definitive Agreement to acquire Video Processor Specialist W&W Communications
• JEDA Launches the First Commercial TLM2.0 Compliance Checker

Headlines for Tuesday Nov. 25, 2008

• UMC Advances its High-k/Metal-Gate Process Solution
• DE Releases UltraLong FFT IP Cores for Xilinx FPGAs
• Federal Trade Commission Files Petition for Certiorari in the Supreme Court in Rambus Case
• Imagination Technologies extends POWERVR I2P Interlace-to-Progressive scan converter IP core family
• POWERVR SGX540 from Imagination Technologies now in silicon

Headlines for Monday Nov. 24, 2008

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Has Imagination added Sony to Apple consumer design win?

Word on the street is that Imagination Technologies Group plc, licensor of graphics processor cores, has added Sony to its tally of international electronics systems company licensees.

• ICs address H.264/AVC compression issues
• SiliconBlue and Magma Strengthen Technology Partnership
• Imagination Technologies Licenses High-performance Graphics Processor Core to a Major International Consumer Electronics Company
• Sundance and Dillon Marry Fastest FFT with Fastest Virtex-5 LXT FPGA
• Creative Chips Adopts Synopsys' Galaxy Custom Designer Mixed-Signal Implementation Solution
• Open-Plug powers the new J132 mobile phone from Sony Ericsson
• NEC Electronics Releases SoC Optimized for Stream Processing

Headlines for Friday Nov. 21, 2008

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Ultra-low power 16-bit microcontroller core consumes less than 40 uA per MIPS.

Tiempo today announces its new chip, fully operational at first run, that silicon-proves its 16-bit microcontroller core IP – TAM16 – on a CMOS 130 nm general-purpose process. The chip logic has been entirely designed in Tiempo’s innovative asynchronous and delay insensitive technology.

• TSMC's Chang: IC downturn will be 'tough'
• MOSAID Reports Results for Second Quarter Fiscal 2009 and Dividend
• Cadence Announces Appointments of R&D and Worldwide Field Operations Leaders

Headlines for Thursday Nov. 20, 2008

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ARM Unveils IP Portfolio Program - New Model for ARM IP

Socle Technology Corp, one of the world’s leading-edge providers of SoC design, is first member of ARM’s IP Portfolio Program which enables fabless design houses to exploit the widest range of ARM technology as part of a full turnkey service.

• Xilinx Offers First 5Gbps FPGA-Based Solution Compliant With PCI Express Version 2.0
• Teridian Semiconductor Licenses ColdFire Architecture from IPextreme
• Synopsys Unveils IP OEM Partner Program with Arrow Electronics, Global Unichip and Open-Silicon
• NXP Semiconductors Trading Update
• Staccato Announces Merger with Artimi and Secures New Financing
• POWERVR SGX520, the world’s smallest OpenGL ES 2.0 core achieves Khronos conformance
• Ambric Announces Sale of Company and Assets
• Agilent Technologies Announces Industry's First Licensing Model Dedicated to Advanced Verification for RFICs

Headlines for Wednesday Nov. 19, 2008

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Imagination announces latest POWERVR VXE video encoder IP cores

Imagination Technologies announced today the availability of two new IP cores in the POWERVR™ VXE video encoder family. POWERVR VXE251 and VXE280 deliver multi-standard encode at SD and HD resolutions respectively

• Mentor Graphics Reports Fiscal Third Quarter Results
• Lattice Enhances Industry's Leading Hardened SPI4.2 Solution Portfolio
• OCP-IP Releases New OCP Checker as Part of CoreCreator II Tool
• Xilinx Releases Industry's First Complete Digital Front-End Design to Accelerate Development of 3GPP LTE Radios for Wireless Base Stations
• ARC International Announces Virtual Bass Audio Enrichment Solution
• Imagination technologies shows ISDB-T full-seg on low-power multi-standard receiver IP platform
• Tensilica HiFi 2 Audio DSP Supports aacPlus by Dolby in Digital Audio Broadcasting Plus (DAB+) Decoder
• Synopsys Unveils Breakthrough Modeling Technology to Address Library Data Size Explosion at 45-nm and Below

Headlines for Tuesday Nov. 18, 2008

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GDA Technologies Ships Configurable USB 3.0 Controller

GDA Technologies announced plans today to ship “Pravega”--its USB 3.0 family of cores consisting of a highly configurable Superspeed device and host controllers that are interoperable with third party USB 3.0 PHY’s running at 5 Gbits/s maximum speeds.

• ASMedia Licenses Range of MIPS Cores for Multimedia SoC Development
• Tektronix Leverages Altera HardCopy II Devices to Reduce Time-to-Market of New Oscilloscope Series by 20 Percent
• Digital Blocks Extends the DB9000 TFT LCD Controller IP Core Family with the availability of the DB9000AXI for the AMBA 3.0 Interconnect
• Actel Leverages UMC Foundry Solutions for 65nm eFlash FPGAs
• Schild Joins Embedded Memory Leader Sidense as Vice President of Sales
• Genesys Logic Selects nSys for SuperSpeed USB Verification
• sRAM generator HAUMEA at 90 nm on DOLPHIN Integration's website
• Transmeta Corporation Agrees to Be Acquired by Novafora, Inc.
• Transmeta Reports Third Quarter 2008 Results
• Carbon and Tensilica Partner for Pre-Silicon Firmware Development
• Vizio Enters into MPEG LA's MPEG-2 License

Headlines for Monday Nov. 17, 2008

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Cadence Announces Development of OVM Verification IP for USB 3.0 and PCI Express 3.0 High-Speed Protocols

Cadence Design Systems today announced the planned first quarter 2009 availability of new Open Verification Methodology (OVM) verification IP (VIP) for two key high-speed protocols: USB 3.0 and PCI Express 3.0.

• Wipro-NewLogic delivers WLAN and Bluetooth RF IPs in TSMC 90nm
• TSMC Ramps 40nm Volume Production to Promote Innovation as Foundries Assume a Larger Role for $300 Billion Industry
• Xilinx Enhances Popular XtremeDSP Solutions Video Starter Kit to Accelerate Video Development
• VinChip announces USB 3.0 Verification IP for Super Speed USB Devices
• nSys Announces Availability of FREE Evaluation licenses of USB 3.0 Verification Suite
• Does the analog foundry model hold water?
• High-voltage hype charges up foundries
• Adobe and ARM Accelerate Flash and AIR for ARM Platforms
• Aldec Releases Unified 64-bit Multi-Threaded HDL Design Environment
• Odds for success in analog foundries
• Viewpoint: Business as 'unusual' for chip makers

Headlines for Friday Nov. 14, 2008

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Faraday Technology and Fresco Logic Partner to Validate SuperSpeed USB PHY (USB 3.0) with SuperSpeed Digital xHCI Host and Device Controller

Faraday Technology and Fresco Logic today announced a partnership to validate the integration of Faraday's USB 3.0 (SuperSpeed USB) PHY IP (Physical Layer IP) with Fresco Logic's USB 3.0 xHCI Host and Device Controller IP.

• Sandbridge Rolls out 65nm dynamically reprogrammable, 4G capable baseband platform for Smartphones
• Silicon Clocks Appoints Semiconductor IP and MEMS Veteran Didier Lacroix as CEO

Headlines for Thursday Nov. 13, 2008

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PLDA Announces SuperSpeed USB IP Solutions, Providing Designers With Immediate Ability to Integrate USB 3.0 Host And Device Functionality

PLDA today announced the immediate availability of a new line of SuperSpeed USB IP products designed for ASIC and FPGA.

• Microtronix updates Multi-port SDRAM Memory Controller IP Cores to support Stratix III and Arria GX FPGA devices.
• SiRF signs licence agreement for Imagination Technologies' multimedia IP
• Tower Semiconductor Reports Third Quarter 2008 Financial Results
• ARM and Canonical to Bring Full Ubuntu Desktop Experience to Low-Power, ARM Technology-Based Computing Devices
• An insider perspective on the semiconductor industry
• Jazz Licenses Its RF Design Enablement Technology to Fujitsu Microelectronics, Providing Time-to-Market Advantage for 90nm and 65nm RF CMOS Customers
• Open-Silicon Introduces MAX Technologies

Headlines for Wednesday Nov. 12, 2008

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Synopsys Announces Complete SuperSpeed USB IP Solution Consisting of Device Controller, PHY and Verification IP

Synopsys today announced a complete, single vendor SuperSpeed USB IP solution consisting of the DesignWare® device controller, PHY and verification IP.

• Ralink Leverages MIPS32 Processors in 802.11n Access Point/Router SoCs for Broadband, VoIP, Gaming and Entertainment Applications
• ARM Introduces Software Interface Standard for Cortex Processor-based Microcontrollers
• Forty CAST IP Cores Validated for Mentor Graphic's Precision FPGA Synthesis Tool

Headlines for Tuesday Nov. 11, 2008

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Coreworks introduces SideWorks, a high-performance, small footprint and ultra low power licensable Digital Signal Processing (DSP) Core

SideWorks™ creates breakthrough in addressing Audio and Video applications in demand of area-optimized, performance and optimal power consumption

• Mentor Graphics Lowers Fiscal 2009 Guidance
• eSilicon Delivers 65nm Silicon and Package to Achronix
• Key ASIC and MoSys Collaborate to Bring Unique Embedded Memory Solution to the High Resolution Portable LCD Driver Market
• RealVideo Expands Appeal of 388VDO to Products that Effectively Display Internet Content on Everything from Mobile Devices to D1
• Xilinx and Eutecus Demonstrate Programmable Embedded Video Analytics Platform at Electronica 2008
• NXP Semiconductors signs agreement with Imagination for graphics technology
• eASIC and Video-Cores Deliver Low-Cost Video IP Solutions
• Calypto Announces New SLEC Release for Comprehensive Verification of Wireless, Video, Image Processing System-on-Chip Designs

Headlines for Monday Nov. 10, 2008

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Denali Software Premieres Verification IP for the New SuperSpeed USB Interface

Denali today announced that its PureSpec™ verification intellectual property (VIP) product now supports the USB 3.0 specification from the USB 3.0 Promoter Group , allowing device and system designers to begin advanced USB 3.0 development.

• Kilopass Technology Announces 30% Price Reduction In Embedded Non-Volatile Memory for Integrated Circuit (IC) Design
• TSMC October 2008 Sales Report
• ARM Announces Industry's First Silicon-on-Insulator Physical IP Library for IBM's New 45nm SOI Foundry
• Tokyo Electron Device Announces simultaneous release of three high-density FPGA PCI express platforms
• ARC International Interim Management Statement
• Northwest Logic Announces the Immediate Availability of x8 PCI Express 2.0 Solution For Xilinx Virtex-5 FXT FPGA Platform
• Altera's Stratix III Devices Featured in Industry's Largest Capacity ASIC Prototyping Board
• Datang Holdings to Invest US$172 Million in SMIC
• Two major awards for Algotronix in a week
• Atrenta Announces "SpyGlass(R) Clean" Flow with Leading ESL Synthesis Providers
• Comment: EDA and the road ahead

Headlines for Friday Nov. 07, 2008

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Rambus Files Complaint with International Trade Commission

The complaint seeks an exclusion order barring the importation, sale for importation, or sale after importation of products that infringe nine Rambus patents from the Ware and Barth families of patents.

• Faraday Monthly Sales Report -- October 2008

Headlines for Thursday Nov. 06, 2008

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Cadence Announces Restructuring Program

The company expects to eliminate at least 625 full-time positions, representing 12% of its global employee base, plus a substantial number of contractors and consultants.

• ST-NXP Wireless Adjusts to Changed Business Conditions and Accelerates Efforts to Capture Identified Synergies
• Manycore Processor Adoption Barriers Lowered by New Development Tools from Plurality
• Micronas Licenses Range of MIPS Processor Cores for Consumer Electronics
• eInfochips announces DDR2 SDRAM verification IP and Reed Solomon Encoder design IP
• Sun Microsystems Collaborates with Europractice on Landmark Agreement to Advance UltraSPARC CMT for Multi-core, Multithreaded Processor Design in Europe
• Opinion: EDA is not well -- where is it heading?

Headlines for Wednesday Nov. 05, 2008

• Real Intent Introduces Meridian FPGA, Popular Clock Domain Crossing Verification Software for Altera Customers
• TSMC Adds New High Voltage Features to Advanced 0.13-micron Processes Aimed at High Resolution Display Drivers
• Xilinx considers letting startups cobrand packaged FPGAs

Headlines for Tuesday Nov. 04, 2008

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Wipro-NewLogic and IN2FAB Technology launch Analog and Mixed Signal "Port on Demand" service

The co-operation enables IC designs and IP to be ported to a manufacturing standard in just a few weeks, typically offering upto 10X reductions in cycle time and engineering costs as well as freeing up customer’s engineers to focus on other potentially higher value added activities.

• Will analog foundry model work?
• Staccato's Ripcord2 Single-Chip UWB Solution Achieves Industry-first Milestone with WiMedia PHY Certification
• Drop in Semiconductor Investment Signals Soft Semiconductor Market
• Cadence Expands Portfolio of System-Level Verification IP and SpeedBridge Adapters to Boost Acceleration and Emulation Performance
• Virage Logic Reports Fourth Quarter and Fiscal Year 2008 Results
• PowerLayer Microsystems Licenses Tensilica's 388VDO Video Engine

Headlines for Monday Nov. 03, 2008

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Evatronix upgrades its SDIO Host Controller with the full support for CPRM, MMC 4.2, and SDIO specification rev. 2.0.

Support for MMC 4.2 guarantees the IP core’s compatibility with the newest MMC-Plus memory cards, and thus increases the maximum data transfer rates to 400 Mbit/s.

• Carbon Design Systems Unleashes Latest Version of SoC Designer
• CEVA SATA IP Deployed in Freescale's PowerQUICC II Pro Communications Product Line
• Innovasic Semiconductor to Produce Pin-Compatible 80C186XL and 80C188XL Embedded Processors
• Silicon Interfaces announces the release of its Verification Methodology Manual (VMM) based USB 2.0 SystemVerilog Verification IP
• Renesas and NXP Announce Licensing Agreement on MIFARE Contactless Technology
• Altera Continues Its Productivity Leadership Position With Quartus II Software Version 8.1