D&R Headline News (November 2009)
Headlines for Monday Nov. 30, 2009
MoSys Announces Availability of Silicon Proven 40nm DDR3 and DDR3/2 Combo PHYs with Support for Datarates up to 2133 Mbps
MoSys today announced the availability of its silicon-proven DDR3 and DDR3/2 combo PHYs. MoSys’ fully-integrated solution complies with the latest DFI specification and provides the physical layer (PHY) interface between the controller logic and DDR3/2 DRAM devices.- Actel Extends Core8051s Processor Support to Rtax, Axcelerator and IGLOO Families
- SH-Mobile Application Engine 4 breaks into GHz realm to open up an entirely new user experience and set the pace for true multimedia convergence
- Virage Logic Announces the Availability of Sonic Focus Adaptive Volume(TM) for Personal Computers, Digital Televisions, Game Consoles and Telephony Products
- Lattice Ships 25 Millionth MachXO Programmable Logic Device
- Kilopass Appoints Juan Chapa as Vice President of Worlwide Sales
Headlines for Friday Nov. 27, 2009
Ingenic and Dolphin Integration announce their renewed cooperation in the field of audio converters.
The two companies reveal today their agreement, whereby the fast growing Chinese embedded microprocessor supplier, Ingenic, has licensed the ultra-low power audio converter from the mixed signal Silicon IP provider, Dolphin Integration.- MOSAID Reports Results for Second Quarter Fiscal 2010 and Dividend
- TSMC Launches Automotive Process Qualification Specification and Service Package in China Market
Headlines for Thursday Nov. 26, 2009
Latest NewsHeadlines for Wednesday Nov. 25, 2009
Latest NewsHeadlines for Tuesday Nov. 24, 2009
Imagination Technologies introduces "Connected Processor" IP cores
Imagination Technologies has created a new class of embedded Connected Processor™ solutions that will power the ‘Internet Everywhere’ generation of consumer electronics.- Samsung Licenses Video System Solution IP from Silicon Hive
- Synopsys Expands DesignWare Data Converter IP Portfolio with 40-nm Solutions
- Imagination Technologies' to deliver production-ready IP for POWERVR SGX543MP multi-processor graphics
- Imagination reveals new META family of embedded SoC processors
- TowerJazz Signs Definitive Agreement with Asian Entity to Provide Know-How, Training, and Turnkey Manufacturing Solutions at a Revenue of US $130 Million
Headlines for Monday Nov. 23, 2009
DMP adds OpenGL ES 2.0 shader-based graphics IP to its new "SMAPH" graphics IP core family
Digital Media Professionals today announced "SMAPH-S", a next generation OpenGL ES 2.0 shader-based graphics IP core. DMP will start providing the core to initial customers in 1Q 2010.- Rambus Comments on Order in Price-Fixing Case
- Evatronix Announces ONFi 2.2 High-Speed Interface Support to its NAND Flash Memory Controller
- DOLPHIN Integration promotes Application Hardware Modeling to optimize system functions
- Samsung Licenses MOSAID Wireless Patents
- Calypto Empowers Intrinsity to Deliver Industry's Fastest, Most Power-efficient Third-party Processor Cores
- Arasan Chip Systems' Redesigned USB 2.0 Hub IP enables Compound Devices to share USB Port
- Lattice Announces First Low Cost FPGA With Serial RapidIO 2.1 Support
- Movial Joins ARM Solution Center for Android
- Magma's Quartz DRC and Quartz LVS Adopted by Toshiba Corporation for Verification and Yield Improvement of Advanced Flash Memory Designs
Headlines for Friday Nov. 20, 2009
Arasan Announces Design Win with Comsys Mobile
Arasan Chip Systems today announced that Comsys Mobile has taken a license for Arasan's SDIO Version 2.0 Device IP Core, which supports a wide range of portable low-power applications such as 802.11 devices, GPS, WiMAX, UWB, among others.Headlines for Thursday Nov. 19, 2009
OCP-IP Releases OCP 3.0 Specification
Open Core Protocol International Partnership (OCP-IP) today announced that OCP 3.0 specification has completed member review and is now the official specification of record. This latest version contains extensions to support cache coherence and more aggressive power management, as well as an additional high-speed consensus profile and other new elements.- Samsung Signs Multi-Year License For Tensilica's HiFi 2 Audio DSP
- Klocwork Launches New Family of Developer Productivity Tools
- Atmel Launches Low-cost LF RFID IC with OTP Functionality and Unsurpassed Read Performance for Small-sized Access Control Systems
Headlines for Wednesday Nov. 18, 2009
Imagination delivers latest HD video encoder IP core with full H.264 High Profile capability
Imagination Technologies announces POWERVR VXE380, the latest member of Imagination’s third generation video encoder IP family, which delivers multi-standard encoding of video, now including H.264 High Profile (HP), at HD resolutions.- Mentor Graphics Delivers Optimized Android Development System for the OMAP35x Processors from Texas Instruments
- picoChip attracts $20 Million investment to accelerate growth
- Actel Expands RTAX-DSP FPGAs with New Configurable DSP IP Cores
- MIPS Technologies Announces Availability of Arriba for Android Porting Kit
- Virage Logic Introduces New Product for Post Silicon Bring Up and System Debug
- Xilinx Simplifies Serial Digital Interface Development for High Performance Professional Broadcast Audio and Video Systems
- Imagination's POWERVR VXD390 adds key new functions to maximise system level performance
- Imagination Technologies announces revolutionary ENSIGMA UCCP320
Headlines for Tuesday Nov. 17, 2009
Rapid Bridge Tapes Out World's Smallest USB 2.0/3.0 PHY
Rapid Bridge announced today that it has taped out the world’s smallest USB 2.0/3.0 PHY. The USB 2.0/3.0 PHY is the newest member of Rapid Bridge’s LiquidPHY™ product family.- Coreworks demos multi-channel audio encoder and decoders at Inter-Bee and Embedded Technology 2009 shows
- AppliedMicro Chooses Carbon Model Studio for System-Level Modeling, Validation
- Virage Logic Completes Acquisition of NXP's Horizontal Advanced CMOS Semiconductor IP Technology and Development Team
- Infineon and ARM Announce Strategic Architectural License Agreement For Advanced Security Applications
- ARM Launches Solution Center to Foster Innovation and Speed Development of Android-Powered Devices
- Paradigm Works Releases RegWorks Spec2Reg as Free, Open Source Software
- Open-Silicon Signs 150th ASIC Design Win
- Atrenta's SpyGlass-CDC Solution Boosts IP Integration Efficiency for Fujitsu Kyushu Network Technologies
Headlines for Monday Nov. 16, 2009
Tiempo demonstrates breakthrough performance for contactless secured applications, improving processing speed by a factor 6
Tiempo is demonstrating at the “Cartes 2009” event how its asynchronous design technology can dramatically improve processing speed for contactless applications with, as an illustration, a live demo of a secured PayPass™ transaction in which processing speed on the card is six times faster than industry implementations, showing a complete transaction in less than 60 ms.- Arasan Chip Systems First to Release SD/SDIO 3.0 Combo Device Controller IP
- eASIC Introduces eTools 8.0
- Lionic selects PLDA IP for their new Generation ePavis II Security Solution
- Gartner Says Worldwide Semiconductor Revenue in 2010 to Rebound to 2008 Levels
- Altera Delivers Industry's First Serial RapidIO 2.1 IP Solution
- Low-Cost Cortex-M0 MCU from NXP targets 8/16-bit applications
- Actel Strengthens Fusion Mixed-Signal FPGA IP Offering for xTCA Platform Management Applications
- Xilinx's New EasyPath-6 FPGAs Deliver Fast, Simple, Risk-Free Cost Reduction for High-Performance Virtex-6 FPGAs in Just Six Weeks
- Lattice Announces Production Release of Highest Density LatticeECP3 FPGA
- Silicon Storage Technology to be Acquired for $2.10 per Share
- Lantiq Successfully Closes Acquisition of Home Networking and DSL Assets and Intellectual Property from Aware
- Magma Announces BoardView: Extends Chip-Based Navigation to Circuit- and Board-Level Debug -- Traces Signals Between Chips, PCBs or MCMs, Speeding Board-Level Failure Analysis
Headlines for Friday Nov. 13, 2009
Dolphin Integration complements its 130 nm catalog with a low voltage release of the ROM Cassiopeia
The patented Cassiopeia architecture for single via programmable ROM is enriched with a capability to operate from nominal voltage down to 1.1 V , both +/- 10%, in the TSMC 130 nm LP process.Headlines for Thursday Nov. 12, 2009
AMD and Intel Announce Settlement of All Antitrust and IP Disputes
Intel and AMD today announced a comprehensive agreement to end all outstanding legal disputes between the companies, including antitrust litigation and patent cross license disputes.- Arasan Claims Worldwide Dominance in Design Wins For Flash Memory Card Interface IP
- Global Unichip announced the retirement of Vice Chairman and CEO K.C. Shih
- Comment: oops NXP did it again
- STMicroelectronics and NXP Announce Agreement for Licensing of Contactless MIFARE technology
- Imagination Technologies and Green Plug agree partnership to develop and promote energy management technology
- Embedded OTP Leader Sidense Hires NVM Veteran Humes for Product Engineering VP Position
- Posedge Annouces High Performance 10 Gbps IEEE 802.1AE (MACsec) IP Core
- Chip inventory levels remain low, says VLSI
- Stretch Inc. Secures $10M in Mezzanine Funding Round
- ZiiLABS Introduces ZMS-08 : The World's First 1080p Blu-ray Quality Handheld Media Processor
- Arphic Technology Joins MIPS Alliance Program
- Qualcomm Now Sampling Industry's First Dual-carrier HSPA+ and Multi-Mode 3G/LTE Chipsets for Global Markets
Headlines for Wednesday Nov. 11, 2009
Commentary: What's next for troubled SMIC?
In just one day alone, China's SMIC suffered three major setbacks. On Tuesday (Nov. 10), it lost a big patent suit, its chief executive, and, in some respects, its independence.- Cavium Networks Signs Definitive Agreement to Acquire MontaVista Software
- Arasan Chip Systems Releases ONFI 2.2 NAND Flash Controllers
Headlines for Tuesday Nov. 10, 2009
GigOptix, Inc. Announces Acquisition of ChipX
GigOptix, a leading high speed analog semiconductor manufacturer specializing in electronic engines for the optically connected digital world, today announced that the company has signed a definitive agreement, and completed the acquisition of ChipX, Incorporated, a privately-held fabless supplier of analog and mixed signal custom Application Specific Integrated Circuits (ASICs) on November 9, 2009.- TSMC October 2009 Sales Report
- NEC Licenses WiLAN Technologies
- Lattice and Beyond Semiconductor to Collaborate in Processor Compiler Tools Development
- New Lattice FPGA Design Tool Suite Includes Advanced Support for High Performance DDR Interfaces
- SMIC Settles All Pending Lawsuits with TSMC: Anticipates No Disruption to Customers
- QualCore Logic successfully validated various Analog IP cores and Special IO's
- Xilinx Improves Transceiver Simulation Time 100x With Release of Industry's First IBIS-AMI FPGA Transceiver Models
Headlines for Monday Nov. 09, 2009
Arteris Enhances Network-on-Chip Offerings to Address Full Range Of SoC Designs
Arteris today announced the availability of two new on-chip interconnect products, the FlexNoC and FlexWay packages. With these offerings, Arteris expands the capabilities of its market-leading NoC Solution to address the complete range of SoC design styles, sizes and complexities.- Comment: Is Abu Dhabi targeting Intel rather than TSMC?
- Analysts: TSMC still faces 40-nm problems
- Atmel Launches New Secure Microcontroller for Smart Objects and System Security Markets
- MagnaChip Semiconductor Emerges from Chapter 11
- WiLAN Provides Litigation Update
Headlines for Friday Nov. 06, 2009
Dolphin Integration launches a new breed of cache controller, dynamically self-configured to minimize power consumption
Traditional cache controllers are offered to improve the system frequency, involving a CPU and its program memory. But these caches are not concerned with power consumption. As a consequence, these solutions do not fit applications targeting low power. To bridge this gap, Dolphin Integration offers a new breed of cache controller: I-Stratus-LP.- Infineon completes the sale of Wireline business; Lantiq becomes a stand alone company
- ON Semiconductor Acquires PulseCore Semiconductor
Headlines for Thursday Nov. 05, 2009
Virage Logic Completes Acquisition of ARC International
ARC Configurable 32-bit Processor Cores and Vertical Application Solutions Complement Virage Logic's Broad Portfolio of Semiconductor IP and Offer SoC Designers a Single Source for Highly Differentiated IP- Arasan Chip Systems Appoints Amos Technologies Its Manufacturer's Representative in Israel
- Top ten Chinese chip design houses ranked
- Infineon and TSMC Extend Technology and Production Partnership Agreement; Will Jointly Develop 65nm Embedded Flash Process Technology For Automotive and Chip Card Applications
- Ittiam Systems Eases Access to Best-in-Class Multimedia Software with Audio and Video Codecs for Mobile Internet Solutions on the latest ARM Cortex-A5 processor
Headlines for Wednesday Nov. 04, 2009
Sonics' On-Chip Network Licensed by Toshiba for High-Performance Video Solutions
Sonics said today that Toshiba has licensed SonicsSX, a high-performance on-chip network, targeted at video-based SoCs (system-on-chips). This latest license represents an extension of Toshiba’s adoption of Sonics’ technology for its next-generation SoC designs.- LTE UE Stack from L&T Infotech Accelerates Availability of LTE Terminal Devices
- Wireless expert Edgar Auslander Appointed Head of ST-Ericsson's Strategic Planning
- ATIC's Acquisition Bid Approved by Chartered Shareholders
Headlines for Tuesday Nov. 03, 2009
ASICS World Services Announces USB 3.0 Device IP Core
ASICS World Services, LTD. today released it's USB 3.0 Device IP Core. The USB 3.0 Device IP Core, supports SuperSpeed transfer speeds of 5Gbit/sec., and can be implemented in any technology, from FPGA to full custom ICs. Direct support is provided for Xilinx Virtex 5 FPGA with GTX transceiver, offering a true single chip solution, without the need for external PHYs. This IP Core also features an industry standard PIPE PHY interface for integration with 3rd party PHYs.- Dolphin Integration - Creation of a competency center in Israel
- Tower and Jazz Semiconductor Announce Major Achievements in First Year of Merger
- Wintegra incorporates PLDA's PCI Express IP in its WinPath3 processors
- HDL Design House Announces I2S Soft IP Core
- Arasan Chip Systems Announces CompactFlash 4.1 Controller Family
- Noesis Technologies releases ITU G.704 E1 Framer/Deframer IP core
- Virage Logic Reports Fourth Quarter and Fiscal Year 2009 Results
- Link_A_Media Secures $18 Million in Series C Funding
- Sundance Features New Texas Instruments TMS320C6472 Multicore DSP in its EVP6472 Development Platform
Headlines for Monday Nov. 02, 2009
MoSys Announces Availability of 40nm PCI Express 2.0 PHY
MoSys today announced the availability of its PCI Express 2.0 PHY. MoSys' PHY complies with the PIPE 2.0 specification and provides the physical layer (PHY) interface that connects to industry standard PCI Express 2.0 controllers.- Mentor Graphics Outlines Strategy to Unify Silicon Test and Yield Analysis
- MIPS Technologies Introduces New Processor Cores with 32-bit Performance and near 16-bit Code Size
- Altera's New Cyclone IV FPGA Expands Reach of Cyclone FPGA Series
- Dolphin Integration introduces Orion, the densest ROM
- New Tensilica DPU Family Delivers 10 GigaMAC/sec DSP Performance, Tops 1 GHz Mark
- GUC announces the mass-production of leading-edge ARM7-based GP5080 series Solid State Disk SoC Solution
- Global Unichip announced today world's first 4 channel H.264 full D1 real time surveillance SoC GP1680 with HD Display design solution
- Ruiz to Step Down as GLOBALFOUNDRIES Chairman
- PLX Technology Completes First Design on Advanced 40nm Process Technology