D&R Headline News (June 2010)

Headlines for Wednesday Jun. 30, 2010

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TSMC Announces Automotive Qualified 0.25-Micron One-Time-Programmable IP

TSMC today announced that its 0.25-micron One-Time-Programmable (OTP) IP now meets Automotive Electronics Council (AEC) standard AEC-Q100 specification.

• Intel vs intilop; Intelop corporation announces its name change to "intilop"
• TowerJazz Licenses Its Y-Flash Non-Volatile Memory Technology to a Leading Digital Foundry
• Virage Logic Continues to Broaden Semiconductor IP Offering With New Portfolio of Production Proven Processor Peripheral Cores
• Tensilica adds FLAC Decoder to HiFi Audio Codec Library
• EVE Achieves Record Bookings of $19.9 Million in Q4 FY2010
• LSI and Seagate Co-develop Technology for Next-Generation High-Capacity Hard Disk Drives

Headlines for Tuesday Jun. 29, 2010

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Development of Close Proximity Wireless Technology with Integrated On-Chip Antenna

Renesas today announced the development of new technology that realizes a close proximity wireless communication over very short distances of a few centimeters, in which a compact antenna only a few square millimeters in area (about one-hundredth the area of conventional antennas) can be integrated with the transmitter and receiver circuit blocks in a single chip.

• Lattice and Affarii Technologies Offer Complete Remote Radio Head Hardware Solution for Wireless Infrastructure
• GE Lighting and Rambus Sign License Agreement to Create LED Lighting Solutions for Global Markets
• Global Unichip selects TranSwitch for Next-Generation HDMI supporting full-rate 3-D High Definition Television

Headlines for Monday Jun. 28, 2010

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Analyst: China's IC manufacturing spend paying off

Semiconductor fabs in China produced 40 billion ICs in 2009, accounting for 25.1 percent of domestic demand, up from 20.9 percent in 2004, according to a new report that concludes that massive investments in China's semiconductor industry are paying dividends.

• Texas Instruments delivers industry's first discrete SuperSpeed USB 3.0 transceiver, offering more than 10 times the speed of USB 2.0
• PLX Sampling Industry's Highest-Performance USB SuperSpeed 3.0 Controllers
• L&T Infotech to collaborate with BWCI on LTE Radio Access Test Bed development
• SMSC's High Speed Inter-Chip (HSIC) USB4640 Available
• WiSpry and IBM Collaborate to Develop Next-Generation of Tunable Mobile Terminal Front-End Technology
• "Lattice Diamond" FPGA Design Software Heralds New Era for Low Power, Cost Sensitive FPGA Applications

Headlines for Friday Jun. 25, 2010

• Dolphin Integration introduces a new Panoply of Silicon IPs for reducing the 65 nm silicon area up to 10%

Headlines for Thursday Jun. 24, 2010

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MIPS to restructure, align with Android

Processor IP licensor MIPS Technologies Inc. has announced a restructuring plan that will see it reduce headcount and incur a $1 million restructuring charge. The changes are expected to save company between $2 million and $2.4 million in annual expense, including the current financial year.

• nSys Announces Functional Coverage Test Suites for Upcoming PCI Express 3.0 Specification
• Mentor Graphics Adopts Shareholder Rights Plan
• Elliptic Technologies Upgrades DRM Solution to Latest DTCP-IP Standard
• IEEE Launches Next Generation of High-Rate Ethernet with New IEEE 802.3ba Standard
• IBM, Samsung and GLOBALFOUNDRIES Set for Fab Synchronization to Produce Advanced Chips Based on 28nm Process Technology with STMicroelectronics

Headlines for Wednesday Jun. 23, 2010

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Virage Logic Releases Major Update of the Open Source GNU and Linux Toolchains for Its ARC Processor Cores

Virage Logic today announced it is investing in its ARC processor product portfolio by releasing the ARC GNU 2.3 Toolchain for its complete range of ARC processor cores and the ARC Linux 1.3 Operating System for its ARC® 750D processor.

• PCI Express 3.0 delayed until 2011
• InterDigital Expands Inventec Appliances Corporation Patent License Agreement to Include Inventec Appliances (Jiangning) Corporation
• MontaVista Software Delivers First Commercial Linux for ARM Cortex-A9 Processors
• Pleora Technologies Joins Altera Partnership Program
• Imagination Technologies - Preliminary Results for the twelve months to 30 April 2010
• Tensilica HiFi Audio DSP Becomes First IP Core Approved for Dolby MS10 Multistream Decoder
• Synopsys Demonstrates Interoperability of DesignWare IP for PCI Express 3.0 at PCI-SIG Developers Conference
• JEDEC Announces Key Attributes of Upcoming Universal Flash Storage Standard

Headlines for Tuesday Jun. 22, 2010

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Sonics Expands Presence in China and Taiwan and Appoints Mac Hale Vice President of Asia Operations

Sonics today announced the company plans to expand its presence in China and Taiwan, naming James Mac Hale as vice president of Asia Operations. Sonics has opened a branch office in Taipei and has established a local team in both Taipei and Shanghai.

• Next Generation Virtual Platform Simulator released by Imperas and OVP Initiative Extends Simulation Speed Advantage By 50 Percent
• Altera Delivers Industry's First Single-Chip Solution for HD WDR Surveillance Cameras
• Arteris Joins TSMC Reference Flow With Network-on-Chip (NoC) Interconnect IP
• Freescale announces Kinetis - one of the most scalable portfolios of mixed signal ARM Cortex-M4 microcontrollers in the industry
• Actel Announces Power Management Solution for SmartFusion Intelligent Mixed Signal FPGAs
• IP Cores, Inc. Ships High-Speed Lossless Compression Core
• Freescale extends QorIQ family with quad-core P3 platform optimized for low power
• Arasan Chip Systems Announces highly integrated 10G Ethernet MAC IP Core
• Mentor Graphics Announces Commercial Linux Platform for Freescale Semiconductor's Processors Based on Power Architecture Technology; Support for New QorIQ P3 and P5 Platform
• Open-Silicon Promotes Taher Madraswala to Vice President of Engineering

Headlines for Monday Jun. 21, 2010

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EC Funds Green Cloud Services Project Investigating Use of ARM Architecture in Data Centers

ARM today announced it is leading a Green Cloud Services project called EuroCloud. The research project aims to validate the value proposition of constructing data center platforms using a combination of low power processing and 3D chip packaging solutions to deliver a significant improvement in cost- and energy-efficiency compared to the approach utilized in incumbent server platforms.

• Cognovo launches Software Defined Modem solution for LTE handsets
• Cadence Global Services Enables Industry's First TD-LTE Baseband Chip from Innofidei
• Xilinx 7 Series FPGAs Slash Power Consumption by 50% and Reach 2 Million Logic Cells on Industry's First Scalable Architecture
• Elpida, PTI, and UMC Partner on 3D IC Integration Development For Advanced Technologies Including 28nm
• Wind River Adds Support for Microsoft Windows XP to Its Embedded Virtualization Offering

Headlines for Friday Jun. 18, 2010

• Cadence Completes Acquisition of Denali
• Xilinx Spartan-6 FPGA First in Industry to Support MECHATROLINK-III Interface for Low-cost, High-speed Factory Automation Networks

Headlines for Thursday Jun. 17, 2010

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Apple's A4: Are we there yet?

A team of experts reviews the evidence on Apple's A4 processor in an attempt to determine its origins and the influence of chip design houses recently acquired by Apple.

• eSilicon Announces Operations Strategy Engagements
• Broadcom Announces Intention to Acquire Innovision Research & Technology PLC
• Toshiba Launches Industry's Largest Embedded NAND Flash Memory Modules
• DAC: IC design bound for cloud computing
• GigOptix Announces Design Win with Hatteras Networks for Next Generation ASIC Design
• Sharp and WiLAN Enter Wireless License Agreement
• Atrenta Announces SpyGlass-Physical for Early Implementation Analysis

Headlines for Wednesday Jun. 16, 2010

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Magillem raises US$ 1 500 000 on Euronext Paris Free Market in secondary offering led by ARKEON FINANCE

Magillem raises US$ 1 500 000 on Euronext Paris Free Market in secondary offering led by ARKEON FINANCE. Proceeds will be used to accelerate international deployment and advanced R&D projects with selected IDM customers. Company closes fourth fiscal exercise on June 30 and is profitable for fourth year in a row.

• eASIC Appoints Richard Heye as Chief Operating Officer
• Syabas Chooses Tuxera NTFS for Media Players

Headlines for Tuesday Jun. 15, 2010

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ARM, IBM, Samsung, GLOBALFOUNDRIES and Synopsys Announce Delivery of 32/28nm HKMG Vertically Optimized Design Platform

ARM, IBM, Samsung Electronics, Co., Ltd., GLOBALFOUNDRIES and Synopsys today announced the delivery of the industry’s first complete vertically optimized 32/28 nanometer (nm) design platform. The solution consists of optimized high performance, low-power processor and physical IP from ARM; tool enablement, connectivity IP and integrated design flow from Synopsys; and 32/28nm low-power process technology from the Common Platform alliance of IBM, Samsung and GLOBALFOUNDRIES.

• TSMC New Standard Cell Slim Library Reduces Logic Area 15%
• SiliconBlue's New iCEcube2 Development Tool Enables the Creation of Breakthrough Innovative Functions That Compliment Mobile Chipsets
• GiDEL Announces The Availability Of TotalHistory, A New Level in ASIC Prototyping and FPGA Debug
• Tokyo Electron Device Announces Release of TB-6V-LX760-LSI LSI Development Test Platform with Virtex-6 FPGA
• Duolog Technologies Appoints New Vice President of North American Sales

Headlines for Monday Jun. 14, 2010

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SEB Venture Capital invests Euros 1.5 million in Coresonic

Coresonic AB, a leading provider of baseband processor technology, has raised € 2 million (SEK 20m) in an issue of new shares. The capital will enable Coresonic to drive the international sales expansion and continue building a strong technology platform.

• Altera Starts Production Shipments of Highest Density Member of Its Stratix IV FPGA Family
• Tiempo Names EDA Industry Veteran Steve Svoboda VP of Business Development as Company Expands to US to Address Demand for Innovative Clockless Chip Design Technology
• Magillem launches CRYSTAL BULB for Advanced Platform Assessment
• CAST H.264 Video Encoder IP Core Now More Flexible, Faster, and Easier to Integrate
• S2C Announces 4th Generation Rapid SoC Prototyping Solution
• CebaTech Adds Multi-Stream GZIP and GUNZIP Protocol for Data Networking Applications
• Posedge's Low Power SoC Communications Subsystem IP Delivers Superior Network Performance and Enhanced Security
• Ensphere Solutions Announces the Availability of 12-port and 4-port 10G Laser Diode Driver Arrays Targeting 10G, 40G, and 100G Long Haul Optical Modules
• Synopsys Unveils Galaxy Characterization Solution for Standard Cells, Complex Macros and Memories

Headlines for Friday Jun. 11, 2010

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Analysis: Acquisitions reflect broadening view of EDA

Recent acquisition activity by large EDA vendors represents the most recent and perhaps boldest evidence of a broadening focus that steps away from a "myopic view of what EDA is that was killing the industry," according to a prominent EDA analyst.

• Dolphin Integration introduces an ultra High Density Library decreasing the 130 nm logic area up to 30%
• TSMC May 2010 Sales Report
• StarChip announces the successful tape-out of its 32bit-Secure Chip SIM platform based on Cortus APS3 processor
• ASICS World Services Achieves Compliance Certification for it's SATA Host IP Core
• Samsung Electronics Qualifies Foundry Industry's First 32nm Low Power High-K Metal Gate Logic Process and Design Ecosystem
• eSilicon and S3 Group Partner to Deliver a One Stop Shop Specification-to-Chip Offering
• Synopsys Acquires High-level Synthesis Technology from Synfora, Inc.
• MOSAID Reports Results for Fourth Quarter and Year-End Fiscal 2010 and Dividend
• MOSAID Proceeds With Breach of Contract Complaint

Headlines for Thursday Jun. 10, 2010

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Synopsys to Acquire Virage Logic Corporation

Synopsys and Virage Logic today announced they have signed a definitive agreement for Synopsys to acquire Virage Logic. Virage Logic's offering will complement Synopsys' DesignWare® interface and analog IP portfolio by adding embedded memories with test and repair, non-volatile memories (NVMs), standard cell libraries, and programmable cores for control and multimedia sub-systems.

• ARM shares spike again
• Bluespec High-Level Synthesis Toolset is Selected by Fujitsu
• Innopower First to Deliver Complete Memory Compiler and Miniaturized Cell Library, miniLib+, for 55nm LP(Low Power) process
• IC Manage Announces Global Design Data Management for Synopsys' Galaxy Custom Designer Solution
• Imagination demonstrates latest Stereoscopic 3D (S3D) graphics and display technologies
• Imagination Technologies announces POWERVR SGX544MP multi-processor graphics IP

Headlines for Wednesday Jun. 09, 2010

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ARM Accelerates Software Development on Hardware Assisted Verification Systems with VSTREAM

ARM today announced the availability of the ARM® VSTREAM™ virtual debug interface; a fast and flexible virtual link that connects software debuggers to hardware assisted verification systems. VSTREAM enables more efficient software development in the early stages of system design, improving the utilization of hardware resources and reducing project risk and time-to-market for new ARM processor-based devices.

• Denali Software DDR SDRAM Controller IP and PHY Solution Integrated into STMicroelectronics' SPEAr Family of Microprocessors
• MoSys and CEVA Partner to Deliver Integrated SATA 3.0 PHY and Controller IP Solution
• Cadence Announces Intention to Offer $300 Million Convertible Senior Notes
• Innovision Research & Technology makes next-generation GEM NFC IP available for licensing
• Report: China group mulls stake in MIPS
• Menta and LIRMM Launch Manufacturing of World's First RAM-based FPGA
• Cyclic Design Announces Enhanced BCH ECC Portfolio: G14X IP Supports 64-bit Error Correction for NAND Flash Applications
• Paradigm Works Announces SystemVerilog FrameWorks Template Generator Support for UVM
• Oasys Design Systems’ Announces Multi-Year Strategic Chip Synthesis Technology License with Xilinx
• austriamicrosystems adopts Nangate's Library Creator for cell library development

Headlines for Tuesday Jun. 08, 2010

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TSMC Unveils Two New Reference Flows

TSMC today introduced Reference Flow 11.0 and Analog/Mixed Signal (AMS) Reference Flow 1.0. Both are key collaborative components of TSMC's recently-announced extension of its Open Innovation Platform™.

• Avery Design Enhances Insight for Reachability Analysis, Lower Power Verification, and RT-Level DFT Analysis
• Imperas Releases Fast Models of PowerPC Processors Through Open Virtual Platforms (OVP) Initiative
• Imec's cognitive baseband radio to support 4G and broadband access to multiple services
• Hynix Licenses Apical's Imaging Cores for its Next Image Sensor Products
• Evatronix Facilitates Its JPEG 2000 Encoder Evaluation with the Online Demo Application
• CAST 80251 Processor IP Core Runs Legacy and New Code Up to 24x Faster
• Xylon Introduces a Novel IP Licensing Program to the FPGA Market
• Tensilica Expands Wireless Baseband Business Unit, Hires Texas Instruments Veteran Eric Dewannain as Vice President/General Manager
• Lattice Semiconductor Reiterates Guidance for Second Quarter 2010
• Ridgetop Group Offers Breakthrough NBTI Solution Addressing Increasing IC Reliability Concerns
• Chips&Media adds VP8 on its new BODA9 / CODA9
• Calypto Extends Industry Lead in RTL Power Optimization

Headlines for Monday Jun. 07, 2010

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PLDA Furthers Its PCIe Industry Leadership with the Introduction of the World's First PCI Express 3.0-Based IP for ASIC and FPGA

PLDA today announced the immediate availability of XpressRich3 - the world’s first IP core for leading FPGAs and ASICs based on the forthcoming PCIe® 3.0 specification, currently under development within the PCI-SIG®. The PLDA XpressRich3 core features an innovative architecture that seamlessly allows both ASIC and FPGA implementations, an extensive list of configurable features and a broad range of user interface options to easily achieve simple to more complex design requirements.

• SiliconBlue Completes $15M Series C Preferred Stock Financing
• TSMC Extends Open Innovation Platform(TM)
• Tiempo Unveils First Timing-Driven Design Flow for its Innovative Clockless Chip Design Technology
• Sidense Introduces Ultra-Low-Power NVM Memory
• Calypto's Industry Expands Lead in ESL Verification with Latest SLEC Release
• Xilinx Virtex-6 and Spartan-6 FPGA Connectivity Targeted Reference Designs Support PCI Express-Compliant Designs
• Actel Delivers Free IP Cores Bundle and RTL Package Option with Standard Software Packages
• CSR and Intel to Collaborate to Take PC Connectivity to the Next Level
• CEVA Partners with Infineon Technologies for Next-Generation Wireless Platforms
• Laird Technologies licenses apt-X for Bluetooth Stereo wireless audio modules
• EVE's ZeBu Emulation System Adopted by STMicroelectronics
• Kilopass Expands Lawsuit Against Sidense to Include Two Additional Patents and False Advertisement
• OneSpin Solutions Enhances 360 MV for Safe, Exhaustive 4-State X-Analysis and X-Verification
• Altera Updates Second Quarter Revenue Guidance
• Mentor Graphics Underscores Support for OVM and Extends That Support to UVM Across Multiple Products
• New Low Cost Brevia Development Kit Accelerates Application Development for Populare LatticeXP2 FPGA Family

Headlines for Friday Jun. 04, 2010

• Dolphin Integration Mid-Year Financial Statements: a Twenty-Fifth Anniversary in Full Recovery
• Nangate announces integration of OpenAccess database for Library Creator Platform into LFoundry's advanced LF150 PDK

Headlines for Thursday Jun. 03, 2010

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Gartner Says Worldwide Semiconductor Revenue to Grow 27 Percent in 2010

Worldwide semiconductor revenue in 2010 is forecast to reach $290 billion in 2010, a 27.1 percent increase from 2009 revenue of $228 billion, according to the latest outlook by Gartner, Inc.

• MoSys and Sarance Partner to Deliver Complete 40 Gigabit and 100 Gigabit Ethernet and Interlaken Solutions
• Mentor Graphics Introduces Precision Rad-Tolerant Product to Provide Unique Advanced Radiation Effects Mitigation
• Duolog Technologies Appoints New General Manager of Integration Services
• Virage Logic Introduces New Sonic Focus(R) PC Audio Enrichment IP
• Sital Announces the Availability of Minuet - World's smallest Mil-Std-1553 Component
• Vennsa Technologies Sets Sights on Moving Chip Verification Beyond Debug
• Aptina Delivers SOC Imaging Solution for 720P/30fps HD Video
• ARM, Freescale, IBM, Samsung, ST-Ericsson and Texas Instruments Form New Company to Speed the Rollout of Linux-Based Devices
• Magillem and Docea Power sign a partnership agreement: for a "power aware" platform description based on IEEE1685
• Xilinx to Offer $520 Million Convertible Senior Notes Due 2017

Headlines for Wednesday Jun. 02, 2010

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Kilopass Announces Industry's Largest Embedded Logic Non-Volatile Memory for Leading-Edge Semiconductor Systems-on-Chip

Kilopass Technology unveiled a one-time programmable 4-Mb non-volatile memory IP product large enough to store the firmware and boot code that is traditionally stored in external serial-flash EEPROM chips.

• Jasper Crosses the Design-to-Verification Chasm
• Docea Power Secures $1.5M in VC Funding

Headlines for Tuesday Jun. 01, 2010

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Analysis: Big spenders reinforce boom-bust cycle

A surge in announcements of increased chip making capital expenditure is not going to make an impact any time soon. But when the spending does hit it will almost certainly produce an oversupply bust sometime as consolidation amongsts the pure-play IDMs exacerbates the boom-bust cycle.

• Mentor Graphics Releases 0-In CDC Version 3.0 to Support Verification Needs of Larger, More Complex Designs
• EVE Adds Support for TLM-2.0 to ZeBu Hardware-Assisted Verification Platforms
• NXP, STMicroelectronics, Trusted Logic and Stollmann to Promote Hardware-Independent NFC API for Android
• Tuxera exFAT Now Available for Android and Linux
• MIPS Technologies Announces Symmetric Multiprocessing (SMP) Support for Android Platform on MIPS-Based SoCs
• MIPS Technologies and SySDSoft Announce First LTE Protocol Stack on Android Platform
• Myriad Group and MIPS Technologies Accelerate Android Application Performance up to 5x
• SiS Selects MIPS(R) Processor IP for SoCs Targeting Mobile Internet Devices With Android(TM) Platform
• Symwave Cuts Power, System Cost, and Size with 2nd Generation USB 3.0 Storage Controller
• CoFluent Design Adds Embedded C Code Generation to its UML and systemC-Based Modeling and Simulation Toolset
• GLOBALFOUNDRIES Expands Worldwide Manufacturing Capacity
• Altera's Stratix IV GT FPGA Selected by NEC for Use in Advanced 100G Transponder Card for DWDM System
• GateRocket(R) Adds Xilinx Virtex-6 Support to Industry-Leading FPGA Verification and Debug Solution
• Android Platform Continues to Gain Momentum on MIPS Architecture for the Connected Home