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ARM today announced the launch of the ARM® Cortex™-R5 MPCore™ and the Cortex-R7 MPCore processors for use in 3G and 4G mobile baseband, mass storage, automotive and industrial markets.
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Accellera announced today that its Board of Directors approved a new version of Accellera's Standard Co-Emulation Modeling Interface (SCE-MI) specification as a new Accellera verification standard.
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Arasan announced that it has been developing the Universal Flash Storage (UFS) IP core, a next generation memory interface being finalized by JEDEC. Arasan has engaged with its strategic lead customers to help them productize this interface.
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Synopsys today announced the immediate availability of the DesignWare® DDR PHY compiler, supporting DDR2, DDR3, LPDDR and LPDDR2 SDRAMs. The DesignWare DDR PHY compiler offers designers a web-based GUI to assemble a customized, high-performance DDR PHY for their SoCs.
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Arasan Chip Systems announced that Hewlett Packard has licensed Arasan’s SuperSpeed USB3.0 Controller IP core for next generation products.
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Altera today announced its portfolio of 28-nm devices. Altera is providing customers clearly differentiated solutions across the new Cyclone® V and Arria® V FPGA families, the recently expanded Stratix® V FPGA and previously announced HardCopy® V ASIC families.
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Don't look now, but Taiwan Semiconductor Manufacturing Co. Ltd. (TSMC) is expected to boost its capital spending for 2011.
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ARM and IBM today announced an agreement between the two companies to extend their collaboration on advanced semiconductor technologies. The resulting technology will provide a suite of optimized physical and processor IP by ARM tuned to IBM’s advanced manufacturing process down to 14nm.
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Cosmic Circuits today announced its portfolio of over 30 Analog to Digital Converters for Monitoring applications. The Analog to Digital Converter cores typically used for Monitoring Applications are available at 8 - 12 bits of resolutions and speeds from 200KSPS to 20MSPS.
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CEVA today announced the latest addition to its CEVA-TeakLite-III DSP architecture. The CEVA-TL3211 is an advanced DSP targeting the growing needs of low cost smartphones and high-definition (HD) audio features within digital televisions (DTV), set-top-boxes (STB), and Blu-ray Disc players.
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MoSys today announced sample availability and the shipment of its first Bandwidth Engine® integrated circuit (IC) devices in December 2010.
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SMSC and Conexant Systems today announced the signing of a definitive agreement under which SMSC will purchase all of the outstanding shares of Conexant in a stock and cash transaction valued at approximately $284 million including the assumption of Conexant's net debt.
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Mark January 5, 2011 as the date of the big PC earthquake. That's when Steve Ballmer said the next version of Windows will run on ARM and Jen-Hsun Huang made Nvidia the first chip maker to say it will deliver a soup-to-nuts family of ARM chips for computing.
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Microsoft Corp. today announced at 2011 International CES that the next version of Windows will support System on a Chip (SoC) architectures, including ARM-based systems from partners NVIDIA Corp., Qualcomm Inc. and Texas Instruments Inc.
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MIPS Technologies today unveiled the new SmartCE (Connected Entertainment) platform. The SmartCE platform integrates Android, Adobe® Flash® Platform for TV, Skype, the Home Jinni ConnecTV application, social media and other key technologies to provide a truly connected consumer experience on home entertainment devices such as digital televisions, set-top boxes and Blu-ray players.
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The United States International Trade Commission has announced that it will launch an investigation into various chips and memory controllers and products that contain them, including PC motherboards, modems, routers and computers, following a complaint filed by Rambus Inc.
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Trilinear Technologies, Inc., announced the addition of two new DisplayPort link controller cores to its product portfolio. The Trilinear VF-111T DisplayPort Transmitter core and VF-117R DisplayPort Receiver core support the Video Electronic Standards Association (VESA) DisplayPort 1.1a standard and are available for implementation in FPGA or ASIC devices.