D&R Headline News (May 2011)

Headlines for Tuesday May. 31, 2011

Top Story

EnSilica and Evatronix collaborate on USB connectivity for eSi-RISC processors

EnSilica has announced a collaboration with Evatronix to offer fully featured eSi-RISC processor SoC solutions incorporating USB 1.1, 2.0 and 3.0 connectivity. The collaboration with Evatronix adds an important building block to EnSilica’s strategy of providing customers with eSi-RISC processor sub-systems complete with integrated peripherals.

• TowerJazz Announces Availability of Wireless Antenna Switch SOI Process Technology
• Elpida, PTI, and UMC Partner on 3D IC Integration Development For Advanced Technologies Including 28nm
• Silicon Image Unveils Third-Generation WirelessHD 60GHz Chipsets
• MIPS Technologies Advances "Apps on MIPS" Development
• DSP Group Releases Groundbreaking XpandR III Wireless Multimedia Chip
• Mentor Graphics Forges TLM Synthesis Link Between Hardware Implementation and Virtual Prototyping
• India starts hunt for fab-building chipmakers
• Nimbic Launches Scalable and Secure Cloud Computing Solution for Electronic Design Automation
• TowerJazz Announces New Design Center Partnership Incentive Program
• Duolog and ARM Provide Accelerated IP Integration
• MIPS Technologies and Ingenic Semiconductor Collaborate to Bring Android 'Honeycomb' to New 1GHz MIPS-Based™ Mobile SoC
• Cryptography Research Announces License Agreement with Broadcom for Differential Power Analysis Countermeasures Patents
• MIPS Technologies and SiS Continue to Drive Android into the Digital Home
• Lattice Semiconductor and Digi-Key Sign Global Distribution Agreement
• MIPS Technologies and Actions Semiconductor Collaborate to Bring Android 'Honeycomb' to New 1.3GHz Chipset for Tablets

Headlines for Monday May. 30, 2011

• eSilicon Adds China Region to its TSMC VCA Partnership
• Linaro partners with Samsung ecosystem to deliver exciting new low cost board 'Origen' to Open Source developers
• Paradigm Works Announces that VerificationWorks is Now UVM 1.0 Compliant
• Linaro completes first year with demonstrations of Linaro Evaluation Builds for Android and Ubuntu and introduction of new partner program

Headlines for Friday May. 27, 2011

Top Story

CAST Adds Video and Image Processing Cores to Compression IP Product Line

New IP cores for image scaling, video deinterlacing, and graphics acceleration are now available in the Video and Image IP core product line of semiconductor intellectual property (IP) provider CAST, Inc.

• Open-Silicon Introduces "On Time, or On Us" Program
• Chipus announces silicon-proven ultra-low-power PMU IP for portable applications on LFoundry's 150nm technology
• Smart Grid sensitized by Dolphin Integration with high resolution and low-power metering subsystem

Headlines for Thursday May. 26, 2011

• Cisco Senior Vice President of Engineering Pankaj Patel Joins eASIC Board of Directors
• PLDA Announces Expansion of Its Worldwide Distribution Network with the Addition of Key Chinese Distributors - Comtech and Shanghai Jiatao Industrial
• TSMC Completes 28nm Design Infrastructure, Design Partners Show Solutions at DAC
• Extreme DA and ATopTech Announce Partnership for Timing Sign-off Closure
• Real Intent and Calypto Partner to Offer Best-in-Class Integrated Tool Flow for RTL Power Optimization and Sign-Off

Headlines for Wednesday May. 25, 2011

Top Story

Huawei Symantec Technologies Selects PerfectVIPs' Storage Verification IPs (VIPs) for New Product Development

PerfectVIPs today announced that Huawei Symantec, the newly formed joint venture, has selected PerfectVIPs’ storage verification solutions to help in the verification of their next generation product development.

• Sibridge Technologies & Axiom Design Automation Partner to Integrate Verification IPs with SystemVerilog
• OCP-IP Develops New Relaxed Commercial Use License for SystemC Transaction Level Modeling Kit
• eASIC Announces easicopy ASIC
• EVE, Xena Networks Link Hardware-Assisted Verification Platform with Ethernet Testing Solution
• Carbon Adds AXI Analysis Capabilities to SoC Designer Plus
• NXP and Intrinsic-ID demonstrate new security concept on NXP’s security chip against cloning and counterfeiting
• Silicon Image Introduces 300MHz Port Processors and Transmitter Supporting HDMI 1.4a
• Low power vs high performance at 22 nm & below

Headlines for Tuesday May. 24, 2011

Top Story

Open-Silicon Secures 20th Interlaken IP License

Open-Silicon announced today it has received its 20th ASIC license for the Open-Silicon Interlaken IP core. In addition, the IP has been taped out in 28nm technology and is now silicon proven at 40nm.

• Analog Bits Partnership Program Collaborates To Ensure Next Generation Success

Headlines for Monday May. 23, 2011

• Rohde & Schwarz and Synopsys Form Strategic Collaboration for LTE/LTE-Advanced Design Acceleration
• Realtek Introduces a Quad GbE PHY for Customers Designing with BroadLight’s Third Generation Processors
• National Instruments to Acquire AWR Corporation, a Leader in RF Design Tools
• Intel's embedded chief has big expectations
• SpringSoft's New ProtoLink Probe Visulaizer Speeds Verification of FPGA-Based Prototype Boards
• Renesas Electronics Ramps Up Production of USB 3.0 Host Controllers to Six Million Units Per Month
• OneSpin launches industry’s first comprehensive solution for automatic metric-driven formal assertion-based verification coverage analysis and measurement
• Up from the patent mine, Rambus sees the light
• ST keeps faith in wireless "big-chip-in-the-middle"

Headlines for Friday May. 20, 2011

Top Story

The art of embedding Non-Volatile Memories renewed by Dolphin Integration's Cache

Dolphin Integration launches I-Stratus-LP, the first Cache Controller with a unique architecture optimized for Low-Power. Associated with the company's Low-Power SRAM, this Cache Controller creates an “apparent NVM” with unmatched performances: up to 8 times less consuming and up to 3 times faster when compared to the sole NVM!

• ST's new ARM-based DTV platform leverages ST-Ericsson

Headlines for Thursday May. 19, 2011

Top Story

Intel: ARM gets Windows four ways

Microsoft's plan to put Windows 8 on ARM will result in a fragmented set of four releases, none of which will run legacy PC apps, said Intel executives.

• SMIC Reports 2011 First Quarter Results
• Intel: Under the smoke and mirrors
• ARM Upgrades Validation Methodology for Processor and System IP with Jasper
• Synopsys Posts Financial Results for Second Quarter Fiscal Year 2011
• MOSAID Files Complaint Against Cisco at International Trade Commission (ITC)
• Texas Instruments expands licensing agreements with Imagination Technologies to include POWERVR Series6 next generation high-performance graphics processor core
• Carbon Design Systems Adds ARM Cortex-A15 Models to its IP Exchange Web Portal

Headlines for Wednesday May. 18, 2011

• New and existing investors back Nujira's vision with £10 million round
• EVE Expands ZeBu Line with New Vertical Solutions
• EVE Integrates ZeBu with ARM VSTREAM Virtual Debug Interface
• Vennsa Unveils OnPoint with Powerful Triage Engine, Enhanced Accuracy, Increased Capacity

Headlines for Tuesday May. 17, 2011

Top Story

Xilinx Establishes Industry-Leading Communications Portfolio for 100G and Beyond Line-cards with the Acquisition of Sarance Technologies

Acquisition of leading silicon IP provider bolsters Xilinx's capabilities for providing 40G, 100G, 150G and beyond Interlaken, Ethernet, and High-Bandwidth Bridges to large System Vendors

• Sequans in New Collaboration to Secure LTE Ecosystem
• Crocus Technology Strikes $300 Million Financing Deal with RUSNANO to Build Advanced MRAM Manufacturing Facility in Russia
• Rambus Announces Pentelic Lighting Solutions
• ARM Announces Cortex-M System Design Kit
• Analyst: AMD-ARM deal makes no sense
• Silicon Image Completes Acquisition of SiBEAM
• Atrenta Ships the Industry's Most Comprehensive RTL Platform

Headlines for Monday May. 16, 2011

Top Story

Design starts triple for TSMC at 28-nm

The number of IC design starts at 28-nm for foundry Taiwan Semiconductor Manufacturing Co. Ltd. is more than three times what they were at the equivalent stage in the roll out of 40-nm manufacturing processes, according to a company executive.

• Spansion and SMIC Expand Foundry Agreement
• MOSAID and Hynix Enter Into Patent License and Acquisition Agreements
• Icera exit is good news for startups
• NextOp Reduces Engineering Development Time with BugScope Assertion Synthesis for Assertion-Based Verification
• Dolphin Integration enables 1P3M/1P4M SoC designs at 180 nm with their ultra high density standard cell library
• Lattice Semiconductor and System General Announce Programming Support for Lattice MachXO2 PLD Family
• OneSpin Solutions Announces 360 MV-Based Formal Verification Environment Adopted by Renesas Electronics Microcontroller Platforms
• Renesas Electronics licenses further high-performance graphics processor cores from Imagination Technologies

Headlines for Friday May. 13, 2011

Top Story

Arasan Chip Systems Releases ONFI 3.0 NAND Flash Controllers

Arasan announced the availability of NAND Flash Controllers supporting the newest Open NAND Flash Interface (ONFI) 3.0 specification. The Arasan ONFI 3.0 compliant NAND Flash Controller IP Core is a full featured, easy to use, synthesizable design that is easily integrated into any SoC or FPGA development.

• Rambus Receives Decision from Court of Appeals for the Federal Circuit
• MOSAID Appoints J. Ian Giffen to Board of Directors
• Icahn nominees win seats on Mentor's board
• Rambus Signs Definitive Agreement to Acquire Cryptography Research

Headlines for Thursday May. 12, 2011

Top Story

Synopsys' DesignWare SATA 6Gb/s IP Solutions Receive SATA-IO Certification

Synopsys today announced that its DesignWare® SATA IP solutions, including Host and Device Digital Controllers and mixed-signal PHY IP, have successfully passed the Serial ATA International Organization (SATA-IO) 6G certification.

• MoSys Appoints Thomas Riordan as Chief Operating Officer
• SMIC and Hubei Science & Technology Investment Group Sign Joint Venture Agreement in Wuhan
• Kilopass Appoints Mitch Statham Vice President of Worldwide Sales

Headlines for Wednesday May. 11, 2011

• Rambus sowing seeds with memory startups
• Synopsys DesignWare ARC Sound IP Solution First to Support the Dynamic Resolution Adaptation Audio Standard
• IHS: Intel's tri-gates to keep ARM at bay
• NAND Flash Memory Controller IP Core from CAST now Faster and Easier to Integrate
• Fujitsu Expands FM3 Family of 32-bit MCUs with ARM Cortex-M3 Core
• LG Electronics licenses Imagination Technologies' POWERVR graphics IP technologies
• Carbon Design Systems and MIPS Technologies Collaborate to Enable Virtual Platforms
• SpringSoft Rolls Out Advanced Technology Platform for Certitude Functional Qualification System

Headlines for Tuesday May. 10, 2011

Top Story

Tilera Integrates AuthenTec Embedded Security into New TILE-Gx Manycore Processor Family

AuthenTec and Tilera today announced that Tilera has chosen AuthenTec’s SafeXcel embedded hardware security engines for use in its new TILE-Gx™ multicore processor family, targeting data networking, telecom and cloud datacenter servers.

• TSMC April 2011 Sales Report
• Cadence Acquires Altos Design Automation
• MOSAID Initiates Patent Infringement Litigation Against Elpida
• Digital Blocks Expands the DB9000 TFT LCD Controller IP Core Family with Support for the AMBA AXI4 Interconnect
• Imagination Technologies licenses further high-performance graphics processor cores to MediaTek

Headlines for Monday May. 09, 2011

Top Story

NVIDIA to Acquire Baseband and RF Technology Leader Icera

NVIDIA announced today that it has agreed to acquire Icera, a leading innovator of top-performing baseband processors for 3G and 4G cellular phones and tablets. The acquisition, for $367 million in cash, has been approved by both companies' boards of directors and is expected to be completed, subject to customary closing conditions, in approximately 30 days.

• Freescale files for IPO to raise $1 billion
• IEEE 802.3 Ethernet Bandwidth Assessment Ad Hoc Group Launched
• Tabula, MorethanIP and NetLogic Microsystems Collaborate to Develop a Complete Sub-$500 Programmable 100Gb Ethernet Solution
• MIPS Technologies Adopts Myriad's Dalvik Turbo VM Engine for its Android on MIPS Distribution
• Altera's Quartus II Software Version 11.0 Features the Production Release of Qsys System Integration Tool
• Xilinx Expands Portfolio for Meeting Critical High-Bandwidth and QoS Enterprise, Data Center, and Service Provider 100G System Needs
• Dolphin Integration offers the highest performances for an audio CODEC of the Xenon family: up to 106 dB of SNR at 65 nm.
• Posedge selects EnSilica's eSi-3250 processor for innovative 7-core Residential and SMB Gateway SoC
• Cadence and TSMC Collaborate to Deliver DFM Services for TSMC Advanced Processes

Headlines for Friday May. 06, 2011

• ESC: Seven takeaways from Microchip CEO
• Video IP deployment rapidly accelerating says Imagination

Headlines for Thursday May. 05, 2011

Top Story

Intel Reinvents Transistors Using New 3-D Structure

Intel Corporation today announced a significant breakthrough in the evolution of the transistor, the microscopic building block of modern electronics.

• Cryptography Research and Athena Announce Developer Ecosystem Agreement for Differential Power Analysis Countermeasures Patents
• ARM to win 13% PC processor share in 2015, says IDC
• Imagination introduces next step in Flow Technology for connected embedded systems
• Chip market grows, despite revision
• Mikroprojekt Announces DVI/HDMI 1.4 Interfaces
• Synopsys' DesignWare SuperSpeed USB 3.0 xHCI Host Controller IP Receives USB-IF Certification
• Intel tips 22-nm tri-gate, but mobile is MIA
• Cosmic Circuits announces proven 65nm MIPI PHY IP for TSMC Technology, followed with 40nm, 85nm and 28nm developments
• Alvand Technologies Forms Advisory Board To Guide Expansion
• Realtek Semiconductor Corp. Selects Forte's SystemC High-Level Synthesis, Floating Point IP Software for SoC Design

Headlines for Wednesday May. 04, 2011

Top Story

Cadence Announces Breakthrough in System Development to Meet Demands of "App-driven" Electronics

Cadence today announced a breakthrough in electronic design with a new suite of products that promises to cut system integration time by up to half for next-generation designs. Bringing hardware and software development closer together than ever before, the suite features four connected platforms that enable hardware-software co-design from architectural-level development through to prototyping.

• New ARM Memory Interface Solution Delivers 90 Percent Utilization Efficiency
• ARM Launches DS-5 Professional Edition and ARM Compiler v5.0
• If Intel wins Apple, becomes leading ARM maker
• MIPS Technologies and eCosCentric Announce Availability of eCosPro Developer's Kit for microMIPS
• Cortus, MagnaChip and Taegee Team Up to Create 32Bit ASMCU IP for Touch Screen Applications

Headlines for Tuesday May. 03, 2011

Top Story

Reports: Intel to fab PLDs for second startup

Intel, which last year surprised semiconductor industry observers by agreeing to serve as a foundry provider for programmable logic startup Achronix Semiconductor, has apparently agreed to a similar arrangement with another up-and-coming programmable logic startup, according to a reports.

• MIPI Alliance and USB 3.0 Promoter Group Collaborate to Bring SuperSpeed USB "Inside the Box"
• Adapteva Scalable IP to Transform Multicore Computing Landscape
• Delivering High-Performance, Multicore Applications and Efficient Software: ARM Launches Next Generation System Solution for Debug and Trace
• SingMai Electronics Offers Compact MPU free of charge to Altera users
• Lattice and Oregano Systems Announce Comprehensive Versions of the IEEE-1588 Timing Node System IP Core
• Apple-Samsung friendship turns sour
• Rumor mill: Intel to roll 22-nm
• GN ReSound Inks ASIC Engagement with eSilicon
• InPA Systems and the Dini Group Partner to Provide Rapid Prototyping Solutions
• Veridae Systems Simplifies Validation and Debug of Complex FPGA-based Systems with the New Corus Suite
• NextOp Licenses BugScope Assertion Synthesis to Graphics Leader NVIDIA

Headlines for Monday May. 02, 2011

Top Story

Altera, MIPS Technologies and SLS Announce the MP32 Core, the First MIPS-Based, FPGA-Optimized Soft Core Processor

Altera, MIPS Technologies and System Level Solutions (SLS) Corporation today introduced a MIPS-Based™, FPGA-optimized soft processor for use on Altera's FPGA and ASIC devices.

• Evatronix Enhances its JPEG 2000 IP with DCI 2K 24p and Full HD 30p signal processing capability
• RivieraWaves announces the world's first Bluetooth 3.0 qualified baseband IP
• Lattice Announces 4 x 3.125Gbps SRIO Capability on the Mid-Range LatticeECP3 FPGA Family
• Elpida Develops Industry's First 25nm Process DRAM
• The SpRAM PLUTON is a breeze from Dolphin Integration cooling up to 100 times leakage beyond stand-by modes at 180 nm
• Cypress and Redpine Signals Collaborate to Provide Low-Power 802.11n Wi-Fi® I/O Connectivity for PSoC® 3 and PSoC 5 Platforms