D&R Headline News (September 2013)

Headlines for Monday Sep. 30, 2013

Top Story

Altera Completes Latest Upgrade to IP Portfolio Targeting 28 nm Devices

Altera today announced it has completed the latest upgrade to its portfolio of IP cores targeting 28 nm FPGAs and SoCs.

• Accellera Systems Initiative Enhances IP-XACT Standard with New Vendor Extensions for Analog/Mixed-Signal and Low-Power Designs
• Another negative year for Semiconductor CapEx
• Silicon Image Announces First 4K Ultra HD MHL 3.0 Receiver IC With HDCP 2.2 in Support of Secure Premium Content Transmission
• Imperas Releases the PowerPC 4xx Range of High-Performance Processor Models with Integrated Software Development Environment
• Silicon Vision partners with Mindtree for Bluetooth Low Energy intellectual property solution

Headlines for Thursday Sep. 26, 2013

• Intilop's enhanced Dual 10G NIC powered by their 76 ns TCP accelerator beats Solarflare 10G NIC delivering 4x higher throughput and 4x lower latency
• Americas Region Remains Largest Market for Pure-Play Foundry Sales
• Micron Technology Ships First Samples of Hybrid Memory Cube
• Fujisoft supports the development of Android-powered embedded devices with the launch of their Graphics Accelerator for Android supporting Altera SoC
• InterDigital and Panasonic Mobile Communications Expand Patent License to Cover 4G

Headlines for Wednesday Sep. 25, 2013

Top Story

videantis announces low-delay H.264 High 4:4:4 Intra profile video codec IP core

videantis today announced a new video codec specifically optimized for automotive applications. The codec implements the H.264 High 4:4:4 Intra Profile, has very low encoding and decoding delay, and supports 8, 10 or 12-bit samples for higher-dynamic-range video.

• Groundbreaking iPhone 5s Carries $199 BOM and Manufacturing Cost, IHS Teardown Reveals
• Imagination the Leader in GPU IP, ARM and Vivante Growing Rapidly
• Altera Begins Production Shipments of FPGA Industry's Highest Performance SoCs
• Apple Continues Familiar Design and Pricing Strategy with iPhone 5c, IHS Teardown Reveals
• Undo and ARM Agreement Delivers First Commercial Reversible Linux and Android Application Debugger for ARM Processors

Headlines for Tuesday Sep. 24, 2013

Top Story

M31 Announces MIPI M-PHY Passes TSMC IP Validation Center Program

M31's MIPI M-PHY has completed IP system validation with TSMC's IP Validation Center Program. The TSMC IP Validation Center Program is an extension of TSMC9000, focusing on the auditing of IP designs via silicon test chips.

• Lattice Announces MachXO3 FPGA Family; Most Advanced, Lowest Cost per I/O Programmable Bridging and I/O Expansion Solution
• Rambus Expands Agreement with Freescale Semiconductor
• Xilinx and Analog Devices Achieve JEDEC JESD204B Interoperability
• VESA Refreshes DisplayID Standard to Support Higher Resolutions and Tiled Displays
• OneSpin Solutions Offers Full Availability of its Cloud Computing System After Successful Beta Program
• Micron and Imec Extend Strategic Research Collaboration

Headlines for Monday Sep. 23, 2013

Top Story

SMIC Introduces Its Diversifying Embedded Non-Volatile Memory Platform

SMIC's eNVM platform includes eEEPROM (embedded Electrically Erasable Programmable Read-Only Memory), eFlash (embedded Flash memory), MTP (Multi-Time Programmable), and OTP (One-Time Programmable) at both 0.18µm and 0.13µm technology nodes, along with 55nm eFlash process with target readiness by 2Q14.

• Synopsys Implementation Solution Included in TSMC 16-nm Reference Flow for FinFET Design
• Inside the iPhone 5s
• New Xilinx OTN SmartCORE IP for High Capacity Combined Ethernet and 100G OTN Switching Platforms and Packet-Optical Transport Systems
• Mobile DRAM posts improved revenue in Q2 from dismal first quarter

Headlines for Friday Sep. 20, 2013

Top Story

Arasan Chip Systems Announces Industry First Universal Flash Storage 2.0 Total IP Solution

Arasan announced today the availability of the industry first Universal Flash Storage (UFS) 2.0 Controller IP for mobile SoC and UFS device manufacturers with a MIPI M-PHY® HS Gear 3 physical interface running at 5.8 Gbps per lane and supporting up to 2 lanes.

• MOSAID Doubles In Size - and Becomes Conversant
• TSMC and Cadence Deliver 3D-IC Reference Flow for True 3D Stacking
• Cadence Digital and Custom/Analog Tools Included in TSMC Reference Flows to Enable 16nm FinFET Designs
• North American Semiconductor Equipment Industry Posts August 2013 Book-to-Bill Ratio of 0.98
• Ambiq Micro Closes $10M Series B Funding Led By Austin Ventures

Headlines for Thursday Sep. 19, 2013

Top Story

Synopsys Announces Immediate Availability of Broad Portfolio of Interface IP for TSMC's 20SoC Process

Synopsys today announced the availability of a range of DesignWare Interface IP on TSMC's 20-nanometer (nm) system-on-chip (SoC) process.

• Microsemi Licenses Secure Semiconductor Design Intellectual Property from Cryptography Research
• Gartner Says Worldwide Semiconductor Manufacturing Equipment Spending to Decline 8.5 Percent in 2013
• Vanguard Video Announces Multi-Platform Support for H.265/HEVC
• Real Intent Unveils Major Enhancements in Ascent XV for Early Functional Verification of Digital Designs

Headlines for Wednesday Sep. 18, 2013

Top Story

MIPI Alliance Defines Analog Reference Interface for Envelope Tracking

The MIPI® Alliance announces the availability of its Analog Reference Interface for Envelope Tracking (eTrak) specification. eTrak is a multi-source vendor, independent interface that provides interoperability between multiple 3G/4G modem chipsets and Envelope Tracking Power Supplies (ETPS), enabling wide deployment of envelope tracking technology.

• JEDEC Publishes Universal Flash Storage (UFS) Standard Version 2.0
• Cortus appoints R. Scott Hills as Vice President Sales
• Leading-Edge Technology to be Responsible for Entire 2013 Increase in Pure-Play Foundry Sales

Headlines for Tuesday Sep. 17, 2013

Top Story

TSMC and OIP Ecosystem Partners Deliver 16FinFET and 3D IC Reference Flows

TSMC today released three silicon-validated Reference Flows within the Open Innovation Platform® (OIP) that enable 16FinFET systems-on-chip (SoC) designs and 3D chip stacking packages.

• Mobiveil Appoints Semiconductor IP Industry Veteran Dale Olstinske as the New Vice President of Sales
• Interim Management Statement - Imagination Technologies
• Worldwide Total Semiconductor Market to Grow 3% in 2013 to Reach $298 Billion; Consolidation Still Rife
• WiLAN and Alcatel-Lucent Enter into License Agreement and Settle all Litigations
• Apple Begs the 64-Bit Question
• Spansion Licenses ARM Processor Technology to Power Embedded Systems for Automotive, Industrial and Consumer Applications

Headlines for Monday Sep. 16, 2013

Top Story

Cadence Offers Secure Digital 4.0 Host Controller IP Core

Cadence today announced the immediate availability of its Secure Digital (SD) 4.0 Host Controller Intellectual Property (IP) core, which allows designers to achieve the maximum memory card access performance of up to 312MB/s – 3X the performance of the previous specification.

• ARM Launches MCU Engineer Accreditation
• eMemory's NeoMTP Technology Advances in Extensive Touch Panel MCU and TDDI Applications

Headlines for Friday Sep. 13, 2013

• What happens if you shrink a P54C Pentium to 32nm and call it Quark?
• MediaTek and Imagination significantly expand strategic partnership
• Fresco Logic Demonstrates Industry's First SuperSpeed USB 10 Gbps (USB 3.1) Data Transfer

Headlines for Thursday Sep. 12, 2013

Top Story

Vivante Intros Vega GPUs to Maximize OpenGL ES 3.0 Performance in Mass Market Android and Chrome Devices with Screens of Any Size

Vivante today announced its new Vega IP product line that brings GPU performance, API completeness and silicon cost-savings to SOC manufacturers addressing the global market for high performance, battery-efficient mass market devices – from Wearables to Streaming TV Dongles to Tablets and Smartphones.

• Live demonstration of Allegro DVT's HEVC/H.265 Main10 video decoder IP at IBC 2013
• Elliptic Technologies Premiers New Standards-Compliant HDCP 2.2 Solutions with Synopsys HDMI 2.0 IP
• Asia-Pac Soars, Japan Drops in Regional Semiconductor Capex Spending
• Barco Silex releases Video over IP with JPEG 2000 Reference Design at IBC 2013
• SUNY College of Nanoscale Science and Engineering to develop Marcy Nanocenter site for 450mm computer chip manufacturing
• Sigma Designs to Launch New ARM-based Chipset at IBC
• Real Intent Unveils New Release of Ascent Lint for Early Verification of Digital Designs

Headlines for Wednesday Sep. 11, 2013

Top Story

HDL Design House MIPI CSI-2 TX IP core successfully integrated into Fujitsu APIX Companion Chip

HDL Design House today announced that its MIPI CSI-2 Transmitter (HIP 3900) digital IP core, compliant with the MIPI Alliance CSI-2 Specification, has been successfully integrated into Fujitsu Semiconductor Europe GmbH's APIX® Companion Chip.

• Synopsys Demonstrates Industry's First SuperSpeed USB Inter-chip (SSIC) Interoperability
• Cryptography Research and ALi Corporation Sign Architecture License Agreement for DPA Countermeasures
• Apple's New A7 Chip Is Apple's First 64-Bit SoC
• Chinese Memory Firm Pursues NVM Research
• USB-IF Certifies 1,000 SuperSpeed USB (USB 3.0) Products
• Xilinx Showcases Industry's First FPGA-based 80Gbps Network Interface Card (NIC) and New Intel QPI Interface Implementation at IDF13
• Samsung Primes Exynos 5 Octa for ARM big.LITTLE Technology with Heterogeneous Multi-Processing Capability
• PLDA's XpressRICH3 PCI Express 3.0 IP Passes PCI-SIG PCIe 3.0 Compliance Testing
• 25 IC vendors adopt Allegro DVT HEVC/H.265 compliance streams
• OmniTek Introduces Enhanced OSVP Scalable Video Processor IP
• New Intel CEO, President Outline Product Plans, Future of Computing Vision to 'Mobilize' Intel and Developers

Headlines for Tuesday Sep. 10, 2013

Top Story

intoPIX delivers new JPEG2000 RAW FPGA IP-cores to compress Camera Bayer pattern-images

intoPIX introduces a new range of JPEG2000-RAW IP-cores for FPGA that manage HD, 4K or 8K Bayer image sensor output from 10 to 16-bit with an efficient raw Visually lossless compression at various frame rates.

• TSMC August 2013 Revenue Report
• AMD Details Embedded Product Roadmap
• Xilinx and its Ecosystem Expand All Programmable Abstractions to Empower More Designers and Accelerate Productivity up to 15X
• GDA Introduces SSIC (Super Speed Inter-chip) IP
• UMC Reports Sales for August 2013
• Altera Demonstrates Broadcast Solutions at IBC 2013
• Cadence Launches Palladium XP II Verification Platform and Enhanced System Development Suite
• eASIC Raises $23.5M of Growth Capital
• Soitec licencing to TSMC its IP portfolio related to back-side illumination technology for image sensors

Headlines for Monday Sep. 09, 2013

Top Story

Qualcomm Not Big on Big.little

Don't expect Qualcomm to use ARM's big.little or off-the-shelf cores, it aims to lead at the risk of tripping on not-invented-here syndrome.

• USB-IF to Develop Media Agnostic USB Specification
• Mentor and ASSET Deliver IJTAG Automated Chip-to-System-Level IP Integration
• Sidense OTP Preferred by MV Silicon for their Audio Device ICs
• Synopsys Announces DFTMAX Ultra to Significantly Reduce Silicon Test Costs
• Synopsys Announces DesignWare STAR Hierarchical System to Accelerate Silicon Testing of SoCs
• Dialog Semiconductor Licenses Cadence's Industry-Leading Tensilica Hifi Audio/Voice DSP IP
• PRO DESIGN Releases FMC Adapter Kit for Its proFPGA Virtex 7 Based FPGA/ASIC Prototyping Solution
• TSMC and Synopsys Extend Custom Design Collaboration into 16-nm
• Open-Silicon Improves Test Quality with Mentor Graphics Tessent Cell-Aware Test
• Cortina Introduces Industry's First Dual 15G EDC PHY

Headlines for Friday Sep. 06, 2013

Top Story

Barco Silex releases Multi-Channel Ultra HDTV 8K JPEG 2000 encoder and decoder cores

Barco Silex announced today the release of a new range of single-chip, multi-channel 8K UHDTV JPEG 2000 cores. The cores have been implemented on the 28nm FPGA’s and SoC’s of Altera and Xilinx.

• Cadence Announces Industry's First Verification IP for HDMI 2.0
• GUC Monthly Sales Report - August 2013
• HashFast and Uniquify Announce Tape Out of "Golden Nonce" Bitcoin Network Transaction Verification Chip to TSMC's 28HPM Process

Headlines for Thursday Sep. 05, 2013

Top Story

Synopsys Launches DesignWare HDMI 2.0 TX/RX Controller and PHY IP for Ultra High-Definition Multimedia Experience

Synopsys today launched its DesignWare ® HDMI 2.0 TX/RX IP solutions, including controller, PHY, and example Linux drivers to reduce designers' integration risk and time-to-market.

• Caskeid from Imagination provides the ultimate solution for wireless multiroom audio
• Intel Unveils New Technologies for Efficient Cloud Datacenters
• Intel Beats ARM Servers
• Philips ensures customers lose the wires but not the audio quality with aptX
• VMC uses eASIC to Achieve 24.756 TH/s Bitcoin Miner
• SiliconAid Solutions, PLX Technology Partner on IEEE P1687-, IEEE 1149.1-2013-Based Test Development

Headlines for Wednesday Sep. 04, 2013

Top Story

Broadcom to Acquire LTE-Related Assets from Affiliates of Renesas Electronics Corporation

Broadcom today announced a definitive agreement to acquire LTE-related assets from affiliates of Renesas Electronics Corporation.

• MIPI Alliance Announces the Formation of a New Birds of a Feather Group to Investigate Software Integration of Hardware Devices
• Altera and Micron Lead Industry with FPGA and Hybrid Memory Cube Interoperability
• Fab Equipment Spending Up 25% in 2014
• Global Semiconductor Industry Posts Highest Sales Total of 2013 in July
• DCD announces new release of its D26C92 UART IP Core
• SMIC Adopts Cadence Digital Flow With Advanced Features for Improving Area, Power and Performance
• Semtech-Snowbush IP Announces Support for Common Electrical Interface (CEI) 25G and 28G On New 28nm PHY IP Platform
• Ittiam Systems to demonstrate real-time 1080p HEVC Encoding and 4K HEVC Decoding at IBC'13
• SMIC's 2013 Technology Symposiums Kicks Off in Shanghai
• HDMI Forum Releases Version 2.0 of the HDMI Specification

Headlines for Tuesday Sep. 03, 2013

Top Story

ARM Acquires Advanced Display Technology from Cadence

ARM and Cadence today announced that the companies have signed a definitive agreement for the sale and transfer of Cadence PANTA display controller cores to ARM.

• Microsoft Is Not the New Apple
• P-Product and ASOCS Offer Software-Defined Radio Solution for Node B Base Stations
• Is Nokia Headed for Troll Country?
• Samsung Widely Deploys Synopsys' Design Compiler Graphical for Mobile SoC Designs
• Silicon Studio Partners With Vivante
• ARM founder Sir Robin Saxby, CSR founder Glenn Collinson and wireless expert Professor Andrew Nix join advisory board of 60GHz IP firm Blu Wireless

Headlines for Monday Sep. 02, 2013

Top Story

RivieraWaves Announces its Wi-Fi Partnership with Celeno

RivieraWaves today announced an agreement to partner with Celeno Communications, a leading provider of high-performance Wi-Fi chips and software. The partnership will enable RivieraWaves and Celeno to jointly develop advanced Wi-Fi technology to address various market segments. In 2012, over 1.5 billion Wi-Fi enabled devices were shipped worldwide.

• Look out ARM, Intel, here comes MIPS - again