D&R Headline News (December 2018)

Headlines for Thursday Dec. 27, 2018

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CEVA Reaches New Milestone with 10th Design Win for its SIG Qualified Bluetooth Mesh IP

CEVA today announced that its Bluetooth® SIG qualified RivieraWaves Bluetooth Low Energy (BLE) Mesh IP has achieved a significant milestone, having already been licensed to ten customers who are targeting a wide range of use cases and applications leveraging the Mesh Profile Specification.

• Foxconn Reportedly Readies Chip Fab in China
• InPlay Technologies Licenses and Deploys CEVA's Bluetooth 5 Low Energy IP for Breakthrough SoC Targeting Wearable, Healthcare and Wireless IoT Markets

Headlines for Thursday Dec. 20, 2018

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Graphcore secures lead in global AI chip race with $200 million in new capital from BMW, Microsoft and leading financial investors

Graphcore reaches $1.7Bn valuation with new funding from leading venture capital, financial and strategic investors including Atomico, BMW i Ventures, Merian Chrysalis Investment Company Limited, Microsoft, Sequoia and Sofina.

• Mobile Semiconductor Introduces a 22nm FDX (FDSOI) ULP Memory Compiler with Market Leading Features
• Attopsemi Technology Attended SemIsrael 2018 and Presented a Talk "100% Testable OTP for Automotive"

Headlines for Wednesday Dec. 19, 2018

• Industry Leaders Collaborate with Synopsys on Modeling Standards to Address Design Down to 2nm

Headlines for Tuesday Dec. 18, 2018

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Wave Computing Launches the MIPS Open Initiative To Accelerate Innovation for the Renowned MIPS Architecture

Wave Computing®, the Silicon Valley company that is accelerating artificial intelligence (AI) from the edge to the data center, announced it will open source its MIPS instruction set architecture (ISA) to accelerate the ability for semiconductor companies, developers and universities to adopt and innovate using MIPS for next-generation system-on-chip (SoC) designs.

• Cisco Announces Intent to Acquire Silicon Photonics Leader, Luxtera
• Arm announces new "Automotive Enhanced" processor designed for safe next-gen driver experiences
• MIPS Goes Open Source
• Total Fab Equipment Spending Reverses Course, Growth Outlook Revised Downward
• Former Intel exec to lead Arm's automotive and embedded business
• JEDEC Updates Groundbreaking High Bandwidth Memory (HBM) Standard
• Dover Microsystems' Revolutionary Silicon IP Cybersecurity Approach Fuels Momentum

Headlines for Monday Dec. 17, 2018

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Arasan Announces availability of its Total I3C IP Solution for Xilinx FPGA's

Arasan today announced the immediate availability of its Total MIPI I3C IP Solution for use with Xilinx FPGA’s. The Arasan I3C Master IP and I3C Slave IP have been prototyped on Xilinx FPGA’s and taken to multiple MIPI I3C Interoperability Sessions, including the one recently held as part of MIPI Devcon in Seoul, South Korea.

• Vidtoo Technology Licenses Codasip's Bk3 RISC-V Processor for High-Performance Computing SoC
• eMemory's Reprogrammable NeoMTP Qualified on GLOBALFOUNDRIES' 130nm BCDLite and BCD Technology Platforms for Automotive Applications
• Bluespec, Inc. Releases a Second Family of Open-Source RISC-V Processors to Spur Open Innovation

Headlines for Friday Dec. 14, 2018

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PCS Releases New 3GPP LTE Release 14-Compliant NB-IoT Transceiver IP Supporting High-Band and Low-Band Operation

Palma Ceia SemiDesign (PCS), a provider of next-generation wireless connectivity solutions, today announced a new transceiver IP supporting LTE NB-IoT Release 14. The transceiver IP is targeted for the Internet of Things (IoT) and Machine-to-Machine (M2M) applications.

• DRAM Growth Tops Industry Ranking in 2018; Outlook Dims for 2019

Headlines for Thursday Dec. 13, 2018

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SST and SK hynix system ic Partner to Expand Availability of Embedded SuperFlash Technology

Microchip Technology via its subsidiary Silicon Storage Technology (SST) today announced a strategic partnership with SK hynix system ic to expand the availability of SuperFlash® technology.

• NSITEXE Develops Test Chip with Next-generation Semiconductor IP Core Called a DFP
• Imagination Technologies Group Ltd. Announces CEO Succession
• Efinix Drives AI Edge Computing with Trion T20 FPGA Samples and Expansion of Product Offering to 200K LEs with T200 FPGA

Headlines for Wednesday Dec. 12, 2018

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Minima Processor and NXP Join Forces to Deliver Ultra-Low-Power DSP Solutions

Minima Processor Oy today announced to partner with NXP Semiconductors N.V. (NASDAQ: NXPI) to deliver ultra-low-power digital signal processing (DSP) intellectual property (IP) solutions for a wide range of applications.

• BitSim Demonstrates an Embedded Vision Platform
• Movellus Closes Second Round of Intel Capital Funding
• CEVA's NeuPro Family of Edge AI Processors Wins "Digital Semiconductor Product of the Year" at Elektra Awards 2018
• Semiconductor Equipment Sales Forecast: $62 Billion in 2018 A New Record, Market Reset in 2019 with New High in 2020
• MIPI Alliance Releases I3C Basic Interface Specification for Widespread Implementation in Mobile and Beyond

Headlines for Tuesday Dec. 11, 2018

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Flex Logix Unveils New Architectural Details on its NMAX Neural Inferencing Engine at the Edge AI Summit

Flex Logix® Technologies, Inc. today announced new features and specifications around its NMAX™ neural inferencing engine optimized for edge applications. NMAX provides inferencing throughput from 1 to >100 TOPS with high MAC utilization for batch size of 1, which is a critical requirement for edge applications. Unlike competitive solutions, NMAX achieves this at a much lower cost and with much less power consumption.

• Menta Selected as Sole Provider of Embedded FPGAs for European Processor Initiative
• Siflower Produces Smart Home Access Points With Catena's Wi-Fi 11ac (WiFi-5) Front-End IP
• Kandou Announces 100th Patent Grant by U.S. Patent Office
• Faraday Reveals Its Multi-protocol Video Interface IP on UMC 28HPC
• Gowin Semiconductor Opens European Office and Commences Sales Operations Serving the EMEA Region

Headlines for Monday Dec. 10, 2018

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Brite Semiconductor, Naneng Microelectronics, and PLDA Collaborate to Release Complete PCIe 2.0/3.0 Solution

Brite Semiconductor (“Brite”), a world-leading ASIC design service and DDR controller/PHY IP provider headquartered in Shanghai, China, today announced their collaboration with Naneng Microelectronics and PLDA to deliver a complete PCIe 2.0/3.0 solution based on SMIC’s 40nm and 55nm process technology.

• Cadence Timing Signoff Tools Enable MaxLinear to Deliver Industry's First 400Gbps PAM4 SoC on 16FF Process
• Arm Releases IoT Predictions for 2019
• NVM Express, Inc. Announces NVMe-MI 1.1 Specification in Ratification
• TSMC November 2018 Revenue Report
• Credo selects Moortec's In-Chip Monitoring IP to optimise performance and reliability in their latest generation of SerDes chips
• UMC Reports Sales for November 2018
• Synopsys and imec Demonstrate Accelerated Modeling of Innovative Complementary FET (CFET) Technology
• Mythic Chooses Codasip to Deliver RISC-V Computing in their Revolutionary Neural Network Platform

Headlines for Friday Dec. 07, 2018

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Inside Secure Enters into an Exclusive Agreement to Acquire Verimatrix, Inc. Creating a Software-based Security Powerhouse

Inside Secure today announced it has entered into an exclusivity agreement to acquire Verimatrix, a privately-held company headquartered in San Diego, California, USA.

• Valtrix STING DV Platform Selected by AI Chipmaker Esperanto Technologies

Headlines for Thursday Dec. 06, 2018

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Andes Custom Extension Further Accelerates Your High Performance RISC-V Processors

Andes Technology today announced its newly-released AndeStar™ V5 CPU cores – N25/N25F, NX25/NX25F, A25 and AX25 – support the Andes Custom Extension™ (ACE) feature. The AndeStar™ V5 architecture is the result of RISC-V technology incorporated with Andes innovations based on rich experience in serving embedded processor IPs for over 10 years.

• Codasip Releases Studio 8, a Breakthrough in RISC-V Automation, and the Bk7 RISC-V Processor Core for Real-Time Computing Applications
• CEVA's Bluetooth 5 Low Energy Software and Link Layer IP Integrate with Atmosic Technologies Solutions for Battery-Free IOT Devices
• CoreHW releases IP library with over 200 IP
• Synopsys Posts Financial Results for Fourth Quarter and Fiscal Year 2018
• CEA-LETI Develops Circuits for Neuromorphic Processors That Replace CMOS Transistor-Based Tcam Memory With Rram-Based Tcam Memory
• Zeno Demonstrates Scalability of World's Smallest SRAM Bitcell Technology to FinFET Technology Node at IEDM Conference

Headlines for Wednesday Dec. 05, 2018

• GUC Monthly Sales Report - Nov 2018
• RISC-V Takes a Leap Forward

Headlines for Tuesday Dec. 04, 2018

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Achronix Announces Immediate Availability of Speedcore Gen4 eFPGA IP for AI/ML and Networking Hardware Acceleration Applications

Speedcore Gen4 increases performance 60%, reduces power by 50% and die area by 65% while retaining the original Speedcore eFPGA IP’s abilities to bring programmable hardware-acceleration capabilities to a broad range of compute, networking and storage systems for interface protocol bridging/switching, algorithmic acceleration and packet processing applications.

• Western Digital Delivers New Innovations to Drive Open Standard Interfaces and RISC-V Processor Development
• Numem to Present at IEDM 2018's MRAM Global Innovation Forum
• Codasip Secures $10M in Series A Financing to Expand RISC-V Processor Technology Offerings
• Industry's First RISC-V SoC FPGA Architecture Brings Real-Time to Linux, Giving Developers the Freedom to Innovate in Low-Power, Secure and Reliable Designs
• Global Semiconductor Sales Increase 12.7 Percent Year-to-Year in October; Double-Digit Annual Growth Projected for 2018
• Wave Computing Appoints Industry Veteran Art Swift As President of its Recently Acquired MIPS Licensing Business
• Imagination announces PowerVR Series3NX Neural Network Accelerator, bringing multi-core scalability to the embedded AI market
• Imagination reveals new PowerVR Series9 GPUs

Headlines for Monday Dec. 03, 2018

• Worldwide Semiconductor Equipment Billings Drop to $15.8 Billion in Third Quarter 2018, SEMI Reports
• Imperas and Valtrix announce partnership for RISC-V Processor Verification
• Micron Selects Rambus CryptoManager Platform for Secure Provisioning to Authenta Technology
• NVMe Hits a Tipping Point
• IAR Systems and SiFive partner to meet customers' demands for professional solutions for RISC-V