D&R Headline News (October 2019)

Headlines for Thursday Oct. 31, 2019

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Rambus Achieves Industry-Leading GDDR6 Performance at 18 Gbps

Rambus Inc. (NASDAQ: RMBS), a premier silicon IP and chip provider making data faster and safer, today announced it has achieved industry-leading 18 Gbps performance with the Rambus GDDR6 Memory PHY.

• Faraday Reports Third Quarter 2019 Financial Results
• China IC 'Big Fund' Phase II Aims Self-Sufficiency
• CEVA Appoints Bernadette Andrietti to its Board of Directors
• AI Takes Over Linley Fall Processor Conference
• China GDP and PMI Contraction A Risk Factor For Global Economy
• How to Choose Between AI Accelerators
• Cadence Presented with Four 2019 TSMC Partner of the Year Awards
• DMP adopted for NEDO project of "Survey of issues for finding ideas regarding Technology Development for AI Chip and Next-generation Computing for High-efficiency and High-speed Processing"

Headlines for Wednesday Oct. 30, 2019

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Silex Insight Fast-track FIPS 140-2 Certification with NIST-Validated Crypto Coprocessor

Silex Insight, a leading provider for flexible security IP cores announced it has successfully validated their Crypto Coprocessor (BA450) through the NIST Cryptographic Algorithm Validation Program (CAVP).

• Synopsys and AMD Execute Multi-Year ZeBu Emulation Agreement
• GLOBALFOUNDRIES Appoints Amir Faintuch as SVP and General Manager Leading Computing and Wired Infrastructure Business

Headlines for Tuesday Oct. 29, 2019

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Synopsys Accelerates Cloud Computing SoC Designs with New Die-to-Die PHY IP in Advanced 7nm FinFET Process

Synopsys today announced its DesignWare® Die-to-Die PHY IP for ultra- and extra-short reach connectivity in multi-chip modules (MCM) for hyperscale data center, AI, and networking designs. The DesignWare Die-to-Die PHY IP supports NRZ and PAM-4 signaling from 2.5G to 112G data rates, delivering maximum throughput per die edge for large MCM designs.

• David Zinsner Appointed to Credo Board of Directors
• Synopsys Ships More Than 3,000 HAPS-80 Prototyping Systems
• Achronix and BittWare Launch VectorPath Accelerator Card with Speedster7t FPGAs
• Optima Design Automation Launches with Focus on Next-Generation Semiconductor Functional Safety Tools
• AIC Semiconductor Licenses CEVA's 802.11ax Wi-Fi 6 IP for IoT Connectivity
• 'The AI Inference Processor is Dead'
• Arm to Deliver CHERI-based Prototype to Tackle Security Threats
• Hex Five Adds MultiZone Security Isolation with Micron's Authenta Flash
• TSMC and GLOBALFOUNDRIES Announce Resolution of Global Disputes Through Broad Global Patent Cross-License
• Adesto Joins STMicroelectronics Partner Program to Accelerate Time-to-Market for Customers

Headlines for Monday Oct. 28, 2019

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Sofics Analog I/O's and ESD clamps proven for TSMC 16nm, 12nm and 7nm FinFET processes

Sofics bvba, a leading semiconductor integrated circuit IP provider announced that its TakeCharge® Electrostatic Discharge (ESD) portfolio is silicon proven on TSMC’s advanced 16nm, 12nm and 7nm FinFET processes.

• NSITEXE Achieves First-Pass Silicon Success for High-Performance Data Flow Processor-based SoC Test Chip Using DesignWare IP
• Xilinx Envisions its Future Without Huawei
• Dr. Necip Sayiner Joins Rambus Board of Directors
• SiFive Announces New U8-Series Core IP For High-Performance Compute
• North American Semiconductor Equipment Industry Posts September 2019 Billings
• Accellera Announces Standardization Initiative to Address Design Automation and Tool Interoperability for Functional Safety

Headlines for Friday Oct. 25, 2019

• Micron Introduces Industry's First Silicon-Based Security-as-a-Service Platform for IoT Edge Devices
• Micron Introduces Comprehensive AI Development Platform
• Gidel Provides 3x Acceleration of FPGA and ASIC Development and Validation for Vision and Image Processing

Headlines for Thursday Oct. 24, 2019

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VeriSilicon Releases Most Advanced FD-SOI Design IP Platform on GLOBALFOUNDRIES 22FDX for Edge AI and IoT Applications

VeriSilicon, a Silicon Platform as a Service (SiPaaS®) company, today announced its comprehensive FD-SOI Design IP Platform with more than 30 IPs based on GLOBALFOUNDRIES® (GF®) 22FDX® platform.

• Innosilicon's Broad IP Portfolio Qualified on GLOBALFOUNDRIES 12LP FinFET Platform for High-Performance Applications
• AES Encryption IP Cores from CAST Receive NIST Certification
• Renesas Expands Access to Portfolio of Leading-Edge IP Licenses
• SiFive Announces New SiFive Shield For Modern SoC Design
• TensorFlow gets native support for PowerVR GPUs via optimised open-source SYCL libraries
• Veriest experts presenting at DVCon Europe Conference

Headlines for Wednesday Oct. 23, 2019

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Astera Labs Accelerates PCI Express 5.0 System Deployment in Collaboration with Intel and Synopsys

Astera Labs Inc., in collaboration with Synopsys, Inc. (Nasdaq: SNPS), and Intel (Nasdaq: INTC), today announced an industry-first demonstration of a complete PCI Express® (PCIe®) 5.0 system, delivering 32 GT/s speeds for next-generation server workloads.

• New Arm IP brings intelligent, immersive experiences to mainstream markets

Headlines for Tuesday Oct. 22, 2019

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Chips&Media Delivers The World's First Commercial AV1 Hardware Decoder IP, WAVE510A

Chips&Media recently announced the arrival of WAVE510A, the world’s first commercial AV1 hardware decoder IP that supports the next generation AV1 standard, an open royalty-free video coding format designed for high-quality video transmissions over the internet.

• BrainChip Awarded New Patent for Artificial Intelligence Dynamic Neural Network
• Cadence Announces First-to-Market NVMe 1.4 Verification IP for High-Performance Computing
• Microchip's Low-Power Radiation-Tolerant (RT) PolarFire FPGA Enables High-Bandwidth Space Systems with Lower Total System Cost
• Synopsys Launches New ARC VPX DSP Processor IP for High-performance Signal Processing SoC Designs
• Rambus Closes Sale of Payments and Ticketing Businesses to Visa
• PHY Wireless Launched to Address Today's Real World Cellular Location and Capacity Challenges
• CEVA Celebrates Wireless IoT Milestone, Surpassing 100 Licensing Deals for its Bluetooth and Wi-Fi Technologies
• OPENEDGES and INNOSILICON unveil advanced DDR Controller and DDR PHY integrated IP solutions
• Cadence Reports Third Quarter 2019 Financial Results
• USC ISI The MOSIS Service and Samsung Foundry collaborate to spur microelectronics innovation in the US

Headlines for Monday Oct. 21, 2019

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Samsung wants to rally more fabless customers

Samsung Electronics has held its first Samsung Advanced Foundry Ecosystem (SAFE) Forum 2019 in the United States, sharing the latest technology trends and showing its will to strengthen customer cooperation within the foundry ecosystem.

• TSMC Recognizes Synopsys with Four "Partner of the Year" Awards

Headlines for Friday Oct. 18, 2019

• Cadence 3D-IC Advanced Packaging Integration Flow Certified by Samsung Foundry for its 7LPP Process Technology
• Cadence Automotive Reference Flow Certified by Samsung Foundry for Advanced-Node Design Creation

Headlines for Thursday Oct. 17, 2019

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Silex Insight Introduces Hardware Security Module (HSM) for Xilinx FPGA Devices

Silex Insight, a leading provider for flexible security IP cores, announce a collaboration with Xilinx, Inc. to provide a hardware security module (HSM) for the Xilinx Zynq UltraScale+ MPSoC family, which is available as of today.

• Cadence Custom/AMS Flow Certified for Samsung 5LPE Process Technology
• Synopsys Design Platforms Enabled for Samsung Foundry 2.5D-IC Multi-Die Integration
• Samsung Foundry and Synopsys Deliver Comprehensive Automotive Solutions for Autonomous Driving and ADAS
• Wafer Capacity by Feature Size Shows Rapid Growth at <10nm
• TSMC Reports Third Quarter EPS of NT$3.90
• Locix using Imagination's Ensigma Wi-Fi IP for high-performance local positioning
• SEAKR Selects Rambus SerDes and Security IP for Aerospace and Satellite Communications
• M31 Memory Compiler and GPIO are certified with ASIL-D safety level of ISO 26262
• The Benefits of C-Fuse OTP in IoT, FinTech, and Biometric Applications with High Security Feature
• Lattice MachXO3D Secure Control FPGA Receives Security Certification from NIST
• Confidential Computing Consortium Establishes Formation with Founding Members and Open Governance Structure
• X-FAB Adds Non-Volatile Memory Functions to its 180nm BCD-on-SOI Platform
• SmartDV Heads to DVCon Europe to Showcase VIP Support for Verilator and TileLink, Demonstrate Smart ViPDebug Protocol Debugger

Headlines for Wednesday Oct. 16, 2019

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Silicon IP Provider Allegro DVT Acquires Amphion Semiconductor to Create a New Leader in the Video Codec IP Space

Allegro DVT, the leading provider of video codec compliance test suites and semiconductor video IPs, today announced the acquisition of Amphion Semiconductor, the Belfast-based developer of video codec semiconductor IP solutions.

• sureCore PowerMiser Low Power SRAM IP Now on Samsung 28nm FDS Process Technology
• Brite Semiconductor Begins Mass Production of Smart Meter Chips
• CHIPS Alliance Growth Continues With New Members and Design Workshop this November
• QuickLogic Teams with SiFive to Make eFPGA Technology Available via DesignShare Portfolio
• Numem Inc. Exhibits at Samsung Foundry SAFE FORUM 2019

Headlines for Tuesday Oct. 15, 2019

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Imagination announces second generation IEEE 802.11n Wi-Fi IP designed for low-power applications

Imagination Technologies announces the launch of iEW220, Ensigma’s latest IEEE 802.11a/b/g/n 1X1 SISO Wi-Fi IP solution comprising of RF, baseband and MAC, supporting both 2.4GHz and 5GHz spectrum.

• Mercury Systems Announces Strategic Investment in Trusted Microelectronics Technology Innovation
• NXP to Adopt Synopsys' Native Automotive Design Solutions for Next-generation Safety-critical SoCs
• Synopsys Introduces Native Automotive Solutions Optimized for Efficient Design of Autonomous Driving and ADAS SoCs
• BrainChip Introduces First in a Revolutionary New Breed of Neuromorphic Computing Devices at the Linley Processor Conference

Headlines for Monday Oct. 14, 2019

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Arm Responds to RISC-V, and More

The big news at Arm Techcon this year is that Arm is opening up its instruction set to customers’ customized instructions for Cortex M cores.

• GLOBALFOUNDRIES Acquires Smartcom's PDK Engineering Team to Expand Worldwide Design Enablement Capacity

Headlines for Friday Oct. 11, 2019

• 2019 Microprocessor Slump Snaps Nine Years of Record Sales

Headlines for Thursday Oct. 10, 2019

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GLOBALFOUNDRIES Brings New Level of Security and Protection on 22FDX Platform for Connected Systems

GLOBALFOUNDRIES® (GF®), the world’s leading specialty foundry, announced today that it is working with Arm® to offer secure system-on-chip (SoC) solutions on GF’s 22FDX® platform, based on FD-SOI, for cellular IoT applications.

• Samsung Introduces Advanced Automotive Foundry Solutions Tailored to EMEA Market at Samsung Foundry Forum 2019 Munich
• GLOBALFOUNDRIES and Racyics GmbH Demonstrate Ultra-Low-Power Microcontroller for the Internet of Things
• GLOBALFOUNDRIES Qualifies Synopsys Fusion Design Platform on 12LP FinFET Platform
• Achronix, Cisco, Facebook, Netronome, NXP and zGlue Collaborate on Proof-of-Concept for Chiplet Solutions as Part of OCP ODSA Subproject

Headlines for Wednesday Oct. 09, 2019

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LG Launched Phone Powered by Gyrfalcon Technology Inc.'s AI Chip

The device uses GTI’s edge AI capabilities to improve the photo taking experience by end users by providing Image Enhancement and Real-time Video Bokeh Effect.

• Renesas Electronics Unveils RA Family of 32-Bit Arm Cortex-M Microcontrollers with Superior Performance and Advanced Security for Intelligent IoT Applications
• CCIX Consortium Releases CCIX Base Specification Revision 1.1 Version 1.0 with Support for 32GT/s
• UMC Reports Sales for September 2019
• TSMC September 2019 Revenue Report
• Cadence Collaborates with Arm and Samsung Foundry on Delivery of 5LPE Flow for Mission-Critical Applications Using Next-Generation "Hercules" CPU

Headlines for Tuesday Oct. 08, 2019

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Arm Announces Custom Instructions for embedded CPUs and Mbed OS Partner Governance

Arm Custom Instructions will initially be implemented in Arm Cortex®-M33 CPUs starting in the first half of 2020 at no additional cost to new and existing licensees, enabling SoC designers to add their own instructions for specific embedded and IoT applications without risk of software fragmentation.

• A Total Compute approach to delivering digital immersion under a common architecture
• Collaborating for an autonomous future: Arm and industry leaders establish the Autonomous Vehicle Computing Consortium
• Arm and silicon partners collaborate on IoT development through new Mbed OS Partner Governance model
• UltraSoC announces next-generation hardware-based cybersecurity products
• Qorvo Acquires Cavendish Kinetics, Inc.
• Silex Insight and Medium Inc. accelerate towards 1 million ECDSA signature verifications per second on a blockchain
• Synopsys, Arm, and Samsung Foundry Enable Accelerated Development of Next-Generation Arm "Hercules" Processor on 5LPE Process
• IC'Alps joins Arm Approved Design Partner program to better support customers with ASIC development
• Dream Chip Technologies joined Samsung Foundry's Design Solution Partner (DSP) Program

Headlines for Monday Oct. 07, 2019

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TSMC's N7+ Technology is First EUV Process Delivering Customer Products to Market in High Volume

TSMC (TWSE: 2330, NYSE: TSM) today announced that its seven-nanometer plus (N7+), the industry’s first commercially available Extreme Ultraviolet (EUV) lithography technology, is delivering customer products to market in high volume.

• Dialog Semiconductor to Acquire Creative Chips adding Industrial IoT Products to its Portfolio
• Adesto Engages with the European Space Agency to Develop Next-Generation Satellite Communications Technology
• Synopsys Announces Industry-First Unified Functional Safety Verification Solution to Accelerate Time-to-Certification for IPs and SoCs
• Achronix Exhibits High-Performance FPGA and eFPGA IP Solutions at Arm TechCon
• Moortec to Showcase its Latest Embedded PVT Monitoring IP for 40nm-5nm at the 2019 ARM TechCon in San Jose
• GUC Monthly Sales Report - Sep 2019
• Synopsys to Showcase Optimized Solutions for Arm-based Designs at Arm TechCon 2019

Headlines for Friday Oct. 04, 2019

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CAN to TSN Gateway from CAST Bridges CAN 2.0/FD Buses with Time Sensitive Ethernet

IP core provides easy integration of up to seven CAN buses with an Ethernet network in automotive and industrial systems; will be shown at TSN/A Conference

Headlines for Thursday Oct. 03, 2019

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IP Controller Core CAN 2.0b and CAN FD of Fraunhofer IPMS certified according to ISO security standard

Fraunhofer IPMS has certified its IP designs, CAN 2.0B and CAN FD Controller Core, for functional safety according to ISO26262:2018. System integrators can now be sure that this IP Core fulfills all criteria of the ASIL B level requirements.

• Silicon Creations Named 2019 TSMC Partner of the Year for Analog / Mixed-Signal IP
• Los Alamos National Laboratory Teams with Arm to Develop Tailored, Efficient Processor Architectures
• Synopsys Completes Acquisition of QTronic GmbH
• NXP Launches the GHz Microcontroller Era

Headlines for Wednesday Oct. 02, 2019

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Xilinx Announces Vitis - a Unified Software Platform Unlocking a New Design Experience for All Developers

Xilinx today announced Vitis™ (pronounced Vī-tis), a unified software platform that enables a broad new range of developers – including software engineers and AI scientists – to take advantage of the power of hardware adaptability.

• M31 Technology Won TSMC's 2019 Partner of the Year Award for Specialty Process IP
• Adesto and Cadence Collaborate to Expand xSPI Ecosystem for Emerging IoT Devices

Headlines for Tuesday Oct. 01, 2019

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TSMC Files Complaints Against GlobalFoundries in U.S., Germany and Singapore for Infringement of 25 Patents to Affirm its Technology Leadership and to Protect Its Customers and Consumers Worldwide

TSMC, the world’s leading global innovator in semiconductor manufacturing, filed multiple lawsuits on September 30, 2019 against GlobalFoundries in the United States, Germany and Singapore for its ongoing infringement of 25 TSMC patents by at least its 40nm, 28nm, 22nm, 14nm, and 12nm node processes.

• SmartDV Adds Support for Verilator Open Source HDL Verilog Simulator
• HDL Design House Appoints Frank Werner as Worldwide Sales Director
• Gen-Z Physical Layer Specification 1.1 now available for download
• Global Semiconductor Sales Down 15.9 Percent Year-to-Year in August
• Andes Technology and Tiempo Secure Announce Strategic Partnership to Enhance RISC-V Platform Security up to CC EAL5+ Certification