SoC-e releases IEC 61850/62351 SASCrypt IP Core
February 7, 2018 -- IEC 62351 is a standard developed for handling the security of IEC 61850 series protocols amongs others. The different security objectives include authentication of data transfer through digital signatures, ensuring only authenticated access, prevention of eavesdropping, prevention of playback and spoofing, and intrusion detection. The IEC 62351-6 part provides security for IEC 61850 profiles.
SoC-e has released the IEC 61850/62351 Substation Automation Systems Cryptographic (SASCrypt) IP Core. This IP Core secures the strict real-time traffic used in the Substation Automation Systems and in new Smart Grid premises. It protects GOOSE and Sample-Measured-Values (SMV) frames used to communicate critical equipment within these premises like Merging Units or IEDs. This low-latency IP Core is capable of encrypting, decrypting and authenticating GOOSE or SMV at wire-speed.
SASCrypt IP Core integrates a proprietary low-latency cryptographic cipher specifically optimized for this task. This cipher module provides the required performance with an optimum resource utilization and introducing a delay of few microseconds.
SASCrypt IP is supported on the following Xilinx FPGA Families:
- 6-Series (Spartan, Virtex)
- 7-Series (Zynq, Spartan, Artix, Kintex, Virtex)
- Ultrascale (Kintex, Virtex)
- Ultrascale+ (Zynq MPSoC, Kintex, Virtex)
The reference designs that include the SASCrypt IP Core can be evaluated in SoC-e’s SMARTzynq Brick and SMARTmpsoc Brick.
|
Related News
- SoC-e releases Multiport Time Sensitive Networking (TSN) IP Core
- SoC-e networking IP porfolio extends with SpaceWire: The standard for Spacecraft communication networks
- GE Power Management licenses SoC-e wire-speed Cryptography IP for GOOSE&Sampled Values Security
- Stage Tec introduces HSR for Professional Audio Broadcasting using SoC-e Technology
- SoC-e's 1588Tiny IP Core now supports Layer-3 PTP operation
Breaking News
- Faraday Adds QuickLogic eFPGA to FlashKit‑22RRAM SoC for IoT Edge
- Xylon Introduces Xylon ISP Studio
- Crypto Quantique announces QRoot Lite - a lightweight and configurable root-of-trust IP for resource-constrained IoT devices
- BOS Semiconductors to Partner with Intel to Accelerate Automotive AI Innovation
- Silicon Proven AV1 Decoder IP with support for 12-bit pixel size and 4:4:4 Chroma Sub-Sampling Released by Allegro DVT
Most Popular
- Andes Technology and Imagination Technologies Showcase Android 15 on High-Performance RISC-V Based Platform
- TSMC Unveils Next-Generation A14 Process at North America Technology Symposium
- Synopsys and TSMC Usher In Angstrom-Scale Designs with Certified EDA Flows on Advanced TSMC A16 and N2P Processes
- Certus Semiconductor Joins TSMC IP Alliance Program to Enhance Custom I/O and ESD Solutions
- M31 Collaborates with TSMC to Advance 2nm eUSB2 IP Innovation
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |