Register File with low power retention mode and 3 speed options
CXL gathers speed with 2.0 spec
Running over PCIe physical layer makes open interconnect easier to adopt
By Gary Hilson, EETimes (January 25, 2021)
TORONTO — The Compute Express Link (CXL) specification is forging ahead at a steady pace. Version 2.0 of the open industry-standard interconnect is now available less than two years after its initial inception, while consortium member vendors already releasing products using the latest iteration.
Like the now mature Non-Volatile Memory Express (NVMe) interface specification, CXL 2.0 is adding new features and functionality to meet increased performance demands while staying backwards compatible with its predecessors — CXL 1.0 was released in March 2019 and 1.1 was announced in June of the same year. Updates in 2.0 are being driven by rapidly evolving datacenter architectures that must support the growing demands of emerging workloads for artificial intelligence (AI) and machine learning (ML). The continued proliferation of cloud computing and the “cloudification” of the network and edge are also factors.
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