English
Logic Design Solutions launches Gen4 NVMe host IP
France, Gournay sur Marne --November 4 2024 – The Gen4 NVME-HOST-IP on Artix Ultra Scale Plus of Logic Design Solutions is now available.
It enables random access, sequential access and multi-user access.
FAT32/EXFAT file system working in RAID0 is available as an option.
To show these features, several demos, from which customers can re-use to start their project, are ready to use :
- Sequential access with one disk with or without FAT32/EXFAT.
- Random access evaluation.
- Simultaneous write access and read access (Multi users).
- CPU (C Source code provided) or State Machine (VHDL provided) Demo.
All of these features in one single IP at PCIe Gen4 speed !
|
||||||
Logic Design Solutions Hot IP
Related News
- Logic Design Solutions launches an EXFAT IP Soft Core for NVMe Host
- Logic Design Solutions launches a new version of its NVMe HOST IP Targeting embedded recorder systems
- Logic Design Solutions Launches NVME Host IP on Xilinx Ultrascale & Ultrascale Plus FPGA
- Logic Design Solutions Introduces the first NVMe HOST IP on POLARFIRE SoC FPGA
- Logic Design Solutions Introduces the first NVMe Host IP on PolarFire FPGA
Breaking News
- Arteris Wins Two Gold and One Silver Stevie® Awards in the 2025 American Business Awards®
- Faraday Adds QuickLogic eFPGA to FlashKit‑22RRAM SoC for IoT Edge
- Xylon Introduces Xylon ISP Studio
- Crypto Quantique announces QRoot Lite - a lightweight and configurable root-of-trust IP for resource-constrained IoT devices
- BOS Semiconductors to Partner with Intel to Accelerate Automotive AI Innovation
Most Popular
- Andes Technology and Imagination Technologies Showcase Android 15 on High-Performance RISC-V Based Platform
- TSMC Unveils Next-Generation A14 Process at North America Technology Symposium
- Synopsys and TSMC Usher In Angstrom-Scale Designs with Certified EDA Flows on Advanced TSMC A16 and N2P Processes
- Certus Semiconductor Joins TSMC IP Alliance Program to Enhance Custom I/O and ESD Solutions
- M31 Collaborates with TSMC to Advance 2nm eUSB2 IP Innovation
|
E-mail This Article | 
|
|
Printer-Friendly Page |