QuickLogic Announces $1.4 Million Incremental Funding Modification for its Strategic Radiation Hardened Program
SAN JOSE, Calif., March 31, 2025 -- QuickLogic Corporation (NASDAQ: QUIK), a developer of embedded FPGA (eFPGA) Hard IP and ruggedized FPGAs announced today it has been awarded a $1.43 million Incremental Funding Modification (IFM) for its Strategic Radiation Hardened (SRH) Program. This IFM is in addition to the $6.58 million contract award received in December 2024 and supports the continued development and demonstration of high reliability SRH Field Programmable Gate Array (FPGA) technology.
"Our FPGA and eFPGA Hard IP solutions are specifically engineered to meet the stringent standards of Aerospace and Defense Industrial Base customers," said Brian Faith, president and CEO of QuickLogic. "This Incremental Funding Modification and the recently expanded scope of our ongoing contract underscore the value of the SRH program's aim to meet identified and future Department of Defense (DoD) strategic and space system requirements."
About QuickLogic
QuickLogic Corporation is a fabless semiconductor company specializing in eFPGA Hard IP, discrete FPGAs, and endpoint AI solutions. QuickLogic's unique approach combines cutting-edge technology with open-source tools to deliver highly customizable, low-power solutions for industrial, aerospace, consumer, and computing markets. For more information, visit www.quicklogic.com.
|
QuickLogic Corp. Hot IP
Related News
- QuickLogic Announces $6.575 Million Contract Award for its Strategic Radiation Hardened Program
- QuickLogic Announces $5.26 Million Contract Award
- QuickLogic Awarded a $6.9 Million Base Contract to Develop Strategic Radiation Hardened FPGA Technology
- Everspin Announces a $9.25M Contract to Provide MRAM Technology for Strategic Radiation Hardened eMRAM Macro
- Everspin Announces Contract to Provide MRAM Technology for Strategic Radiation Hardened FPGA
Breaking News
- Silicon Proven AV1 Decoder IP with support for 12-bit pixel size and 4:4:4 Chroma Sub-Sampling Released by Allegro DVT
- Cadence Enables Next-Gen AI and HPC Systems with Industry's Fastest HBM4 12.8Gbps IP Memory System Solution
- S2C and Andes Technology Announce FPGA-Based Prototyping Partnership to Accelerate Advanced RISC-V SoC Development
- PQShield launches UltraPQ-Suite for deeply specialized implementations of post-quantum cryptography
- Andes Technology and Imagination Technologies Showcase Android 15 on High-Performance RISC-V Based Platform
Most Popular
- Certus Semiconductor Joins TSMC IP Alliance Program to Enhance Custom I/O and ESD Solutions
- Cadence to Acquire Arm Artisan Foundation IP Business
- Siemens to accelerate customer time to market with advanced silicon IP through new Alphawave Semi partnership
- New Breakthroughs in China's RISC-V Chip Industry
- Ceva Neural Processing Unit IP for Edge AI Selected by Nextchip for Next-Generation ADAS Solutions
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |