D&R Headline News | Most Popular | SoC News Alerts | |

IP / SOC Products News

• ZeroPoint Technologies introduces zstd Decompression Hardware IP (Wednesday Aug. 07, 2024)
  With this announcement, Zeropoint technologies now offers the only hardware-accelerated solution available for the zstd algorithm.
  
  
• ZeroPoint Technologies introduces LZ4 Compression and Decompression Hardware IP (Monday Aug. 05, 2024)
  ZeroPoint Technologies is excited to announce the availability of LZ4 compression and decompression as a hardware IP.
  
  
• Sondrel's SFA 100 is ideal for AI at the Edge (Wednesday Jul. 31, 2024)
  Sondrel (AIM: SND), a leading provider of ultra-complex custom chips for leading global technology brands, has optimised its SFA 100 to make it ideal for battery-powered, AI at the Edge applications.
  
  
• Weebit Nano and DB HiTek tape-out ReRAM module in DB HiTek's 130nm BCD process (Wednesday Jul. 31, 2024)
  Weebit Nano and tier-1 semiconductor foundry DB HiTek have taped-out (released to manufacturing) a demonstration chip integrating Weebit’s embedded Resistive Random-Access Memory (ReRAM) module in DB HiTek’s 130nm Bipolar-CMOS-DMOS (BCD) process.
  
  
• Alphawave Semi Launches Industry's First 3nm UCIe IP with TSMC CoWoS Packaging (Tuesday Jul. 30, 2024)
  Alphawave Semi has launched the industry's first 3nm successful silicon bring-up of Universal Chiplet Interconnect Express (UCIe™) Die-to-Die (D2D) IP with TSMC’s Chip-on-Wafer-on-Substrate (CoWoS®) advanced packaging technology.
  
  
• Agile Analog delivers customizable IP on GlobalFoundries' FinFet and FDX processes (Thursday Jul. 25, 2024)
  As an ecosystem partner, Agile Analog can now offer its novel portfolio of highly configurable, multi-node analog IP solutions to more GlobalFoundries customers across the globe.
  
  
• Faraday Adds Video Interface IP to Support All Advanced Planar Nodes on UMC Platform (Tuesday Jul. 23, 2024)
  Faraday Technology today announced that its MIPI D-PHY and V-by-One (VBO) PHY IP portfolios now support processes that range from 55nm to 22nm on UMC platform.
  
  
• Synopsys Advances Automotive Security with Industry's First IP Product to Achieve Third-Party Certification for ISO/SAE 21434 Cybersecurity Compliance (Wednesday Jul. 17, 2024)
  Synopsys ARC HS Functional Safety Processor IP Accelerates Qualification of Chips for Connected Vehicles
  
  
• Quadric's 3rd Generation Chimera GPNPU Product Family Expands to 864 TOPs, Adds Automotive-Grade Safety Enhanced Versions (Wednesday Jul. 17, 2024)
  The third-generation implementation of the Chimera architecture, the QC family includes both single core and multicore cluster offerings as well as safety-enhanced versions of both.
  
  
• Allegro DVT Launches The Industry's First Real-Time VVC/H.266 Encoder IP (Tuesday Jul. 16, 2024)
  Allegro DVT, the leading provider of video encoding and decoding semiconductor IP solutions, today announced the availability of its E320 video encoder IP which supports the latest VVC/H.266 codec.
  
  
• Expedera Achieves ISO 26262 ASIL-B Automotive Safety Certification (Tuesday Jul. 16, 2024)
  Expedera Inc., a leading provider of scalable Neural Processing Unit (NPU) semiconductor intellectual property (IP), today announced that it has received Automotive Safety Integrity Level B (ASIL-B) certification according to the ISO 26262 international standard for its Origin™ IP.
  
  
• Qualitas Semiconductor Announces First Domestic Development of PCIe 6.0 PHY IP (Tuesday Jul. 16, 2024)
  QUALITAS SEMICONDUCTOR CO., LTD., a leading provider of high-speed interface IP, has announced the successful development of its PCIe 6.0 PHY IP, a notable achievement in advancing peripheral component interconnect technology.
  
  
• OPENEDGES Successfully Validated Its 7nm HBM3 Testchip (Monday Jul. 15, 2024)
  OPENEDGES Technology, Inc (OPENEDGES), the leading provider of memory subsystem IP, is pleased to announce that its subsidiary, The Six Semiconductor Inc (TSS), has successfully brought-up and validated its HBM3 testchip in 7nm process technology.
  
  
• SiFive Becomes First IP Supplier to Achieve Automotive ISO/SAE 21434:2021 Product Certification (Friday Jul. 12, 2024)
  In the era of software-defined vehicles (SDVs), cybersecurity isn't just a buzzword; it's a critical necessity. SDVs are increasingly vulnerable to cyberattacks thanks to their interconnected systems, huge size of software and vast amounts of data being generated and processed.
  
  
• SiliconIntervention announces an innovative Fractal-D Audio Amplifier Family (Tuesday Jul. 09, 2024)
  Developed using the company’s New Analog platform, members of the family take advantage of a fractal architecture that forms the basis for industry leading improvements in operating efficiencies and resulting power savings.
  
  
• eMemory's Security-Enhanced OTP Qualifies on TSMC N5A Process Specializing in High-Performance Automotive Chips (Wednesday Jul. 03, 2024)
  eMemory’s security-enhanced version of NeoFuse OTP has qualified for the TSMC N5A platform - an enhanced process for automotive applications.
  
  
• Mixel Announces Immediate Availability of MIPI C-PHY/D-PHY Combo IP on STMicroelectronics 40LP Process Technology (Tuesday Jul. 02, 2024)
  Mixel announced today that its MIPI® C-PHYSM/D-PHYSM Combo IP is now available on STMicroelectronics’ 40nm Low Power process technology (CMOS040LP).
  
  
• Tiempo Secure and Menta announce strategic partnership to enhance security solutions (Tuesday Jul. 02, 2024)
  Tiempo Secure and Menta partner to provide a uniquely flexible, certified, embedded Secure Enclave – eFPGA IP solution.
  
  
• Flex Logix Boosts AI Accelerator Performance and Long-Term Efficiency (Tuesday Jul. 02, 2024)
  Embedded FPGA (eFPGA) can reduced memory bandwidth requirements by more than 10x and allows efficient execution of future operators and activation functions
  
  
• Cadence Expands System IP Portfolio with Network on Chip to Optimize Electronic System Connectivity (Wednesday Jun. 26, 2024)
  Cadence Design Systems, Inc. (Nasdaq: CDNS) today expanded its system IP portfolio with the addition of the Cadence® Janus™ Network-on-Chip (NoC).
  
  
• FortifyIQ Introduces FortiPKA-RISC-V: A Breakthrough in Public Key Cryptography Acceleration (Wednesday Jun. 26, 2024)
  FortifyIQ announces the release of FortiPKA-RISC-V, a revolutionary public key accelerator, with enhanced performance and area, designed to meet the demanding requirements of modern asymmetric cryptography algorithms.
  
  
• SiFive Announces 4th Generation of Popular Essential Product Line to Spur Innovation Across Embedded Applications (Tuesday Jun. 25, 2024)
  Today SiFive, Inc. the gold standard for RISC-V computing, is unveiling a major upgrade of its SiFive Essential product family at the RISC-V Summit Europe 2024.
  
  
• Comcores Unveils Industry-First MAC Privacy Protection IP for Enhanced Ethernet Security (Tuesday Jun. 25, 2024)
  Comcores announces the availability of its cutting-edge MAC Privacy Protection IP, keeping in mind the evolving security needs of Ethernet networks, especially low and high-speed Ethernet used in cloud, data center, 5G, industrial, and automotive networks.
  
  
• Semidynamics releases Tensor Unit efficiency data for its new All-In-One AI IP (Tuesday Jun. 25, 2024)
  Semidynamics, the European RISC-V custom core AI specialist, has announced Tensor Unit efficiency data for its ‘All-In-One’ AI IP running a LlaMA-2 7B-parameter Large Language Model (LLM).
  
  
• Enosemi announces availability of C-band-compatible electronic-photonic design IP (Tuesday Jun. 25, 2024)
  Enosemi announces the availability of C-band electronic-photonic design IP in the GlobalFoundries 45SPCLO Fotonix platform.
  
  
• SignatureIP Makes Network-on-Chip (NoC) Design Widely Accessible with Cloud-Based iNoCulator™ Platform (Monday Jun. 24, 2024)
  Available at iNoCulator.ai, it is the first cloud-based platform for design of a Network on Chip (NoC). A NoC provides the interconnect infrastructure between key compute, storage, memory and I/O blocks in a semiconductor chip.
  
  
• Baya Systems and Blue Cheetah Partner to Deliver Chiplet Interconnect Solutions (Monday Jun. 24, 2024)
  Integrating Baya Systems' WeaveIP™ NoC, and Blue Cheetah BlueLynx™ Die-to-Die (D2D) PHY IP solves many of the complexities of chiplet interconnect, greatly simplifying the architecture and design process for chiplet-based systems.
  
  
• Ceva Extends its Smart Edge IP Leadership, Adding New TinyML Optimized NPUs for AIoT Devices to Enable Edge AI Everywhere (Monday Jun. 24, 2024)
  Ceva today announced that it has extended its Ceva-NeuPro family of Edge AI NPUs with the introduction of Ceva-NeuPro-Nano NPUs.
  
  
• Baya Systems Introduces New Technology to Transform SoCs and Chiplets for Emerging Applications (Friday Jun. 21, 2024)
  Baya Systems today emerged from stealth mode to announce its software-driven IP technology portfolio designed to accelerate complex single-die and multi-die SoC designs.
  
  
• Alphawave Semi Unlocks 1.2 TBps Connectivity for High-Performance Compute and AI Infrastructure with 9.2 Gbps HBM3E Subsystem (Thursday Jun. 20, 2024)
  Robust, chiplet-enabled platform based on Micron HBM3E supports best-in-class performance and exceptional power efficiency