English
400G ultra low latency 56/112G FEC and SERDES IP sub 10ns latency
You are here:
0.035... 100 MHz intermediate-frequency amplifier
The intermediate-frequency amplifier consists of 6-stages amplifier with tunable gain, AGC system, linear output buffer for differential analog output.
Gain is sequentially reduced from the last stage to the first stage. This method allows to keep a low noise figure in wide gain range.
The intermediate-frequency amplifier is designed using TSMC 65nm CRN65LP technology.
Gain is sequentially reduced from the last stage to the first stage. This method allows to keep a low noise figure in wide gain range.
The intermediate-frequency amplifier is designed using TSMC 65nm CRN65LP technology.
View 0.035... 100 MHz intermediate-frequency amplifier full description to...
- see the entire 0.035... 100 MHz intermediate-frequency amplifier datasheet
- get in contact with 0.035... 100 MHz intermediate-frequency amplifier Supplier