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400G ultra low latency 56/112G FEC and SERDES IP sub 10ns latency
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1.2 V Bandgap voltage reference
Bandgap voltage reference forms temperature-compensated voltage level equal to the width of the band gap of silicon due to mutual compensation of temperature dependence of bipolar diodes and resistors.
The block is fabricated on SMIC CMOS 0.18µm technology.
The block is fabricated on SMIC CMOS 0.18µm technology.
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VR IP
- Display Processor for VR
- Programmable LDO voltage regulator (output voltage 2.5 V to 2.7 V)
- Programmable LDO voltage regulator (output voltage 2.5 V to 2.7 V)
- Programmable LDO voltage regulator (output voltage 2.5 V to 2.7 V)
- LDO voltage regulator (output voltage value 1.0 V, 1.2 V, 1.5 V, 1.8 V)
- LDO voltage regulator (output voltage 2.7 V)