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1.25 Gbps LVDS IPs library
028TSMC_LVDS_01 is a library including:
• Transmitter LVDS driver (TX_LVDS);
• Receiver LVDS driver (RX_LVDS);
• Reduced range link receiver LVDS driver (RX_LVDS_R);
• Transceiver LVDS driver (RX_TX_LVDS);
• Reference current/voltage generators (RS_TOP);
• Bias block (LVDSBIAS8X) for 8 LVDS drivers
RX_TX_LVDS driver has five available operation modes: transmitter, receiver, transmitter half-duplex, receiver half-duplex and shutdown. The RS_TOP block is intended to output reference currents and voltage for RX_LVDS, RX_LVDS_R, TX_LVDS and TX_RX_LVDS drivers as well as for bias block. Composing of LVDS library components allows to design a device with up to 16 pairs of data channels and 2 pairs of synchronization channels.
• Transmitter LVDS driver (TX_LVDS);
• Receiver LVDS driver (RX_LVDS);
• Reduced range link receiver LVDS driver (RX_LVDS_R);
• Transceiver LVDS driver (RX_TX_LVDS);
• Reference current/voltage generators (RS_TOP);
• Bias block (LVDSBIAS8X) for 8 LVDS drivers
RX_TX_LVDS driver has five available operation modes: transmitter, receiver, transmitter half-duplex, receiver half-duplex and shutdown. The RS_TOP block is intended to output reference currents and voltage for RX_LVDS, RX_LVDS_R, TX_LVDS and TX_RX_LVDS drivers as well as for bias block. Composing of LVDS library components allows to design a device with up to 16 pairs of data channels and 2 pairs of synchronization channels.
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