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MIPI CSI DSI C-PHY IP for TSMC (5nm, 6/7nm, 12/16nm, 22nm, 28nm, 40nm)
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1.2V GPIO
The 1.2V GPIO library provides a bidirectional I/O driver for Parallel Trace Interface applications. This cell is compliant with version 2.0 of the the MIPI Specification for Parallel Trace Interface.
This 5nm library is available in an inline flip chip implementation.
To design a functional I/O power domain with these cells, an additional library is required – 1.8V Support: Power. That library contains isolated analog I/O, and a full complement of power cells along with spacer cells to assemble a complete pad ring by abutment. An included rail splitter allows multiple power domains to be isolated in the same pad ring while maintaining continuous VDD/VSS for robust ESD protection.
This 5nm library is available in an inline flip chip implementation.
To design a functional I/O power domain with these cells, an additional library is required – 1.8V Support: Power. That library contains isolated analog I/O, and a full complement of power cells along with spacer cells to assemble a complete pad ring by abutment. An included rail splitter allows multiple power domains to be isolated in the same pad ring while maintaining continuous VDD/VSS for robust ESD protection.
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