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10/100/1000 base T ethernet Phy
Features
- IEEE 802.3-2008, IEEE 802.3az fully standards compliant
- IEEE 1588-2008 support
- BroadR-Reach™ support
- Dual port MAC interface:
- GMII (10/100/1000BASE-T)
- MII (10/100BASE-T).
- Auto-negotiation support
- Automatic detection and correction of pair swaps (Auto-MDIX), pair skew and pair polarity
- 6 different operating modes:
- 1000BASE-T Full Duplex and Half Duplex
- 100BASE-TX Full Duplex and Half Duplex
- 10BASE-T Full Duplex and Half Duplex
- Management interface
- Baseline wander compensation
- On-chip transmit wave-shaping
- On-chip hybrid circuit
- 10KB jumbo frames
- Internal, external and remote loop back
- Hardware configuration for default operation
- Power down mode,interrupt support
- IEEE 1500 support for SoC testing integration
- LED indication: link mode, status, speed, activity, and collision
- Technology: TSMC 28nm HPC+
- IP Size: 2070 x 925 squm pre-shrink
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Block Diagram of the 10/100/1000 base T ethernet Phy IP Core
10/100/1000 base T ethernet Phy IP
- Silicon Proven 1G Ethernet PHY IP as Whitebox
- GbE (10/100/1000 Base-T) PHY IP, Silicon Proven in UMC 28HPC
- GbE (10/100/1000 Base-T) PHY IP, Silicon Proven in TSMC 28HPC+
- GbE (10/100/1000 Base-T) PHY IP, Silicon Proven in SMIC 28SF
- GbE (10/100/1000 Base-T) PHY IP, Silicon Proven in SAM 14LPP
- GbE (10/100 Base-T) PHY IP, Silicon Proven UMC 28HPC