Aeonic Generate Digital PLL for multi-instance, core logic clocking
10-bit 500 KSPS single-ended SAR ADC
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Analog to Digital Converter ADC IP
- 7-bit, 64 GSPS ADC Ultra Low Power
- Dual core I & Q Analog to Digital Converter
- 15b 4kS/s cyclic/algorithmic serial ADC (Analog/ Digital Converter)
- 12b 1MS/s cyclic/algorithmic serial ADC (Analog/ Digital Converter)
- 14bits, 10Ksps Analog to Digital Converter
- ULP 12 Bits, 35 kS/s SAR Analog to Digital Converter