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10Gb Ethernet PCS
The 10 Gigabit Ethernet (10 GbE) Physical Coding Sublayer (PCS) solution from Lattice Semiconductor enables creation of system solutions for applications using 10 Gigabit Ethernet as defined by IEEE 802.3ae. This IP solution includes soft IP that is targeted to the programmable array section of the ORCA® ORLI10G FPSC. The ORLI10G contains a 10 Gbits/s Transmit and Receive Line Interface, and when combined with this PCS core, enables flexible10GbE LAN/WAN application solutions.
The 10 GbE PCS IP solution includes a 10GbE scrambler/descrambler, 10 GbE Media Independent Interface (XGMII) and 64b/66b encoder/decoder functions. These functions are implemented in software to provide flexibility while the specifications for these interface functions are being finalized. This IP interfaces with the high-speed line interface block embedded in the ORLI10G which implements an OIF standard (OIF 99.102.5) 10Gb 16-bit Interface (XSBI).
The PCS IP is provided in ORCA bitstream format to allow direct downloading and turnkey functionality. Simulation models, test benches and documentation are also provided to support customers in integrating the functions for 10 GbE LAN/WAN applications.
The 10 GbE PCS IP solution includes a 10GbE scrambler/descrambler, 10 GbE Media Independent Interface (XGMII) and 64b/66b encoder/decoder functions. These functions are implemented in software to provide flexibility while the specifications for these interface functions are being finalized. This IP interfaces with the high-speed line interface block embedded in the ORLI10G which implements an OIF standard (OIF 99.102.5) 10Gb 16-bit Interface (XSBI).
The PCS IP is provided in ORCA bitstream format to allow direct downloading and turnkey functionality. Simulation models, test benches and documentation are also provided to support customers in integrating the functions for 10 GbE LAN/WAN applications.
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Block Diagram of the 10Gb Ethernet PCS IP Core
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