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12-bit Charge Redistribution DAC - Fs=160MHz
The 12-bit Charge Redistribution DAC is especially suited to discrete-time applications, where the output signal is sampled, but also works well in continuous-time applications. The Charge Redistribution DAC has been optimized for high speed and low area. It has been designed for applications where DC transfer is not required.
This IP is silicon verified.
This IP is silicon verified.
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Block Diagram of the 12-bit Charge Redistribution DAC - Fs=160MHz
12-bit Charge Redistribution DAC IP
- 12bit 5Gsps silicon proven High performance Current Steering DAC IP Core
- Low area 12bit 2.5Gsps silicon proven High performance Current Steering DAC IP Core
- 12bit 1Gsps silicon proven High performance Current Steering DAC IP Core
- 12bit at 1Msps R2R Low power Silicon Proven DAC IP Core
- 12-Bit Low power successive-approximation ADC
- 12bit 5Msps low power SAR ADC IP core