The TI-12SAR03/1M is a 12-bit fully differential successive approximation analog-to-digital converter (SAR ADC). Its architecture provides good common-mode, supply and substrate noise rejection and typical conversion rate of 1.5 MSPS. The TI-12SAR03/1M operates with external reference voltages and separate supplies and grounds for analog and digital parts. Implemented high-resolution 12-bit digital-to-analog converter (DAC) uses binary weighted capacitor architecture with two segmented arrays allowing to decrease the total input capacitance. Input bootstrap switches provide high linearity and low on-resistance at broad ranges of supplies and operating temperatures. Internal current source with several current modes may be used to set the desired speed/power consumption ratio of the ADC: lower bias currents may be used for lower conversion frequencies.
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Block Diagram of the 12-bit SAR ADC 1.5 MSPS IP Core
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