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55nmHV MTP Non Volatile Memory for Standard CMOS Logic Process
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13-bit, 80 MSPS Analog-to-Digital Converter IP Block
The A13B80M is a low-power, high-speed analog to digital converter (ADC) intellectual property (IP) design block. It is a hybrid-SAR ADC, with 13-bit resolution and a sampling speed of 80 megasamples per second (MSPS).
The A13B80M is a unique solution that provides the dual benefit of reaching a high resolution while maintaining low power consumption, making it a perfect fit for designs with high efficiency, low power, and high-performance requirements.
The IP block has been designed and verified for TSMC 65 nm fabrication process.
The A13B80M is a unique solution that provides the dual benefit of reaching a high resolution while maintaining low power consumption, making it a perfect fit for designs with high efficiency, low power, and high-performance requirements.
The IP block has been designed and verified for TSMC 65 nm fabrication process.
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