14b 30kS/s serial ADC

Features

• Effective Number of Bits: 13.5b (SNDR=83dB signal-to-noise-and-distortion-ratio)
• Power supply 3.3V, Power Consumption 170µW
• 0.35um CMOS Technology
• Low input sampling capacitor of 4pF
• Pseudo differential analog voltage input (3 pins: Vin+, Vin- with adjustable common mode level Vcm)
• Layout chip area < 0,8mm²
• External clock rate 3-4MHz

Block Diagram of the 14b 30kS/s serial ADC IP Core