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16 bit resolution 400MSPS ADC prototype
ITCADC400 is a high-speed ADC with a mixed analog-digital design. The main technology is a multi-bit quantized modulator using pipeline architecture and digital correction technology. The decimation filter is used to down-sample and increase the number of bits to improve the resolution.
The innovative architecture achieves excellent dynamic performance and is insensitive to clock jitter, which allows greater choice of devices and reduces the difficulty of future ASIC design, so it can be used for high-speed ADCs.
The innovative design allows each stage in the modulator to achieve multi-bit quantization, At the same time,it overcomes the non-linearity problem caused by the DAC for feedback comparison.
The innovative architecture achieves excellent dynamic performance and is insensitive to clock jitter, which allows greater choice of devices and reduces the difficulty of future ASIC design, so it can be used for high-speed ADCs.
The innovative design allows each stage in the modulator to achieve multi-bit quantization, At the same time,it overcomes the non-linearity problem caused by the DAC for feedback comparison.
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