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3.2GHz Integer PLL
This is a 1.8V/0.75V dual supply-voltage phase locked loop (PLL) with a wide-output-frequency-range for frequency synthesis. It consists of a phase-frequency detector (PFD), a charge pump, a voltage-controlled oscillator (VCO), a 6-bit pre-divider, a 10-bit main-divider, a 3-bit scaler and an automatic frequency control (AFC).
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Block Diagram of the 3.2GHz Integer PLL IP Core
PLL IP
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