MIPI D-PHY Tx-Only 4 Lanes in TSMC (28nm, 22nm, 16nm, 12nm, N7, N6)
3.3V to 2.5V 50mA LDO voltage regulator
LDO is intended to maintain load current up to 50mA.
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LDO IP
- LDO Voltage Regulator, 30 mA, Adjustable 0.45 V to 0.9 V Output
- LDO Voltage Regulator, 250 mA, Adjustable 0.45 V to 0.9 V Output
- Analog Front End: 2x 12-bit 4 GSPS IQ ADCs, 2x 12-bit 8GSPS IQ DACs, bandgap, temp sensor, PLL, 4 x LDO
- LDO Linear Voltage Regulator
- Ultra-low quiescent LDO voltage regulator in TSMC 22ULL
- Capless 1.8V output LDO with 2.0-3.6V input range - 0.18 EF