DMA AXI4-Stream to/from AXI4 Memory Map - Scatter-Gather Descriptor List
30G MR Multi-Protocol SerDes (MPS) PHY
The 30Gbps Multi-protocol SerDes (MPS) PHY is a comprehensive IP solution targeting medium reach chip-to-chip applications such as aerospace & defence, telecommunication, and neworking.
View 30G MR Multi-Protocol SerDes (MPS) PHY full description to...
- see the entire 30G MR Multi-Protocol SerDes (MPS) PHY datasheet
- get in contact with 30G MR Multi-Protocol SerDes (MPS) PHY Supplier
Multi-protocol IP
- Multi-Protocol Crypto Packet Engine, Low Power, Bus Attached
- Multi-Protocol Crypto Engine
- Multi-Protocol Crypto Engine with Classification
- Multi-Protocol Engine with Classifier, Look-Aside, 5-10 Gbps
- Multi-protocol SerDes PMA - PCIe1 PCIe2 PCIe3 PCIe4 PCIe5 and more
- 1-56/112G Multi-protocol Serdes (Interlaken, JESD204, CPRI, Ethernet, OIF/CEI)