55nmHV MTP Non Volatile Memory for Standard CMOS Logic Process
32-bit, 33 MHz Multifunction Target Interface
The core offers one to eight independent PCI functions in a single chip, each implementing 64 to 256 bytes of PCI Configuration Space registers as required. Each function supports up to six Base Address Registers, with both I/O and Memory space decoding from 16 bytes up to 4GB.
The core was developed for easy reuse with ASICs or FPGAs.
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