English
Secure-IC's Securyzr™ Chacha20-Poly1305 Multi-Booster - 800Gbps
You are here:
40G I.3 BCH Encoder/Decoder for ITU G.975.1
The IPrium-40G-I.3-BCH-Codec IP core implements "Concatenated BCH super FEC" with BCH(3860, 3824) and BCH(2040, 1930) forward error correction algorithms for optical lines and is fully compatible with ITU-T G.975.1 (super-FEC for 2.5G, 10G and 40G optical networks).
View 40G I.3 BCH Encoder/Decoder for ITU G.975.1 full description to...
- see the entire 40G I.3 BCH Encoder/Decoder for ITU G.975.1 datasheet
- get in contact with 40G I.3 BCH Encoder/Decoder for ITU G.975.1 Supplier
Encoder IP
- VESA DSC (Display Stream Compression) 1.2b Video Encoder
- ASIL-B Ready ISO 26262 Certified VESA DSC (Display Stream Compression) 1.1 Encoder
- VDC-M (VESA Display Compression-M) Encoder
- VESA DSC 1.2b Encoder for Xilinx FPGAs
- Enhanced Multi-Format Encoder Supporting AV1
- Up To 5 MPixel Multi-Format Encoder