5/10/40G Ultra Low Latency MAC PCS with AXI-4 and UCIe support

This IP is optimized for AI/ML workloads and lowest possible latency.
It is not meant to be a generic 1G to 10G MAC – it only supports 5G and 10G operation.
Lower speeds such as 2.5G, 1.25G can be used in non – compliant mode.
This IP uses an 8-bit data path and is optimized for a SerDes vendor specific PMA and is currently available for TSMC 12 nm or GF 12 nm processes. More details from YorChip Sales.

IP implements MAC layer, Reconciliation sublayer and 10GBASE-R PCS according to IEEE 802.3 specification for 5/10Gbps. The IP communicates to PMA Service Interface either at 10.3125 Gbps (10GBASE-R) or at 5.15625 Gbps (5GBASE-R). The application side AXI-4 Interface is provided.

IP is intended for latency applications where the MAC/PCS latency is crucial for a complete system.
The round-trip latency (RX + TX) that the IP can achieve @10G is 6.25 nS & 5G is 12.5 nS.
Support IEEE 1588 by providing highly precise transmit and receive timestamping directly at PMA.

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