5-bit programmable ECL high-frequency divider - AMS035 BiCMOS 0.35 um

The 5-bit programmable ECL high-frequency divider is a set of serially connected dividers with the varied dividing ratio 2/3 that is able to scale the structure either into minimum dividing ratio decreasing or maximum dividing ratio increasing. The differential circuit has higher noise immunity. An output divider /2 based on D-trigger provides an input signal duty cycle of 0.5.
The block is fabricated AMS BiCMOS 0.35 um technology.

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