English
You are here:
6.25G SerDes in 55nm
The Actt's 6.25G SerDes IP is a 4-Channel Serdes configuration with 1 PLL, 4 TX channels and 4 RX channels. It’s based on SMIC 55nm embedded-flash technology, and can easily be integrated for customer’s usage. The Serdes IP can operate on 1.25G~6.25Gbps data rate. There is a high performance PLL, which can generates a high-speed and low jitter clock with high to 6.25GHz frequency. Each TX channel
is an ultra-low power voltage mode transmit driver, with built-in adjustable transmit driver termination, and TX amplitude and Pre-emphasis. Each RX channel contains an high performance AFE equalizer and a low power digital CDR. There are also built-in test patterns and CDR check internal the IP
is an ultra-low power voltage mode transmit driver, with built-in adjustable transmit driver termination, and TX amplitude and Pre-emphasis. Each RX channel contains an high performance AFE equalizer and a low power digital CDR. There are also built-in test patterns and CDR check internal the IP
View 6.25G SerDes in 55nm full description to...
- see the entire 6.25G SerDes in 55nm datasheet
- get in contact with 6.25G SerDes in 55nm Supplier
SerDes IP
- PCIe 5.0 Serdes PHY IP, Silicon Proven in TSMC 12FFC
- Low-Latency SerDes PMA
- Multi-protocol SerDes PMA
- 1-56/112G Multi-protocol Serdes (Interlaken, JESD204, CPRI, Ethernet, OIF/CEI)
- 400G ultra low latency 56/112G FEC and SERDES IP sub 10ns latency
- PCIe Gen 6 SERDES IP - supports up to 112G LR ethernet with low power and latency