Unified Hardware IP for Post-Quantum Cryptography based on Kyber and Dilithium
64x8 Bits OTP (One-Time Programmable) IP, UMC 55nm ULP standard CMOS core logic Process
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OTP IP
- 512x8 Bits OTP (One-Time Programmable) IP, TSMC 12FFC 0.8V/1.8V Process
- NVM OTP in Fujitsu (90nm, 65nm, 55nm, 40nm)
- NVM OTP in Dongbu (180nm, 150nm, 110nm)
- NVM OTP in SMIC (110nm, 65nm, 55nm, 40nm)
- NVM OTP in TSMC (180nm, 152nm, 130nm, 110nm, 90nm, 65nm, 55nm, 40nm, 28nm, 22nm, 16nm, 12nm, N7, N6, N5, N4P)
- 4Kx8 Bits OTP (One-Time Programmable) IP, GF 22nm FDX 0.8V/1.8V Process