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65nm 10bit 250MSPS DAC
The 65nm 10bit 54MSPS DAC is a 10-bit, current-output digital-to-analog converter(DAC), which was designed with a 65nm 1P6M CMOS technology.
The 65nm 10bit 54MSPS DAC has current steering architecture with differential outputs. It uses 4 linear bits and 6 binary bits, all of which are generated from within the current source array. This results in reduced glitch energy and non-linearity error at the output.
The 65nm 10bit 54MSPS DAC operates with analog power supply ranging from 3.0V to 3.6V, and its output range covers from 0V to 1.4V. The DAC features the sampling rate of 54MHz over industrial temperature range (-40 ℃ to +85℃) and occupies the core cell area of 0.083mm^2.
The 65nm 10bit 54MSPS DAC has current steering architecture with differential outputs. It uses 4 linear bits and 6 binary bits, all of which are generated from within the current source array. This results in reduced glitch energy and non-linearity error at the output.
The 65nm 10bit 54MSPS DAC operates with analog power supply ranging from 3.0V to 3.6V, and its output range covers from 0V to 1.4V. The DAC features the sampling rate of 54MHz over industrial temperature range (-40 ℃ to +85℃) and occupies the core cell area of 0.083mm^2.
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Block Diagram of the 65nm 10bit 250MSPS DAC IP Core
