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8.5GHz Fractional-N/SSC PLL
PLLF0435S04 is a 1.2V/0.75V dual supply-voltage phase locked loop (PLL) with a wide-output-frequency-range for frequency synthesis.
It consists of a phase frequency detector (PFD), a charge pump, a voltage-controlled oscillator (VCO), a 6-bit pre-divider, a 10-bit main-divider, a 3-bit scaler, a delta-sigma modulator (DSM) and an automatic frequency control (AFC). The maximum output frequency of PLL is 8.5GHz
It consists of a phase frequency detector (PFD), a charge pump, a voltage-controlled oscillator (VCO), a 6-bit pre-divider, a 10-bit main-divider, a 3-bit scaler, a delta-sigma modulator (DSM) and an automatic frequency control (AFC). The maximum output frequency of PLL is 8.5GHz
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Block Diagram of the 8.5GHz Fractional-N/SSC PLL IP Core
