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Synchronous sram IP Listing

301 IP Cores (1 - 40)

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SMIC 0.13um High-Speed Synchronous Single-Port/Dual-Port SRAM

VeriSilicon SMIC 0.13um High-Speed Synchronous Single-Port/Dual-Port SRAM optimized for Semiconductor Manufacturing International Corporation (SMIC) 0.13um Logic 1P8M Salicide 1.2/2.5(3.3)V ...

1
VeriSilicon SMIC 0.13um High-Speed Synchronous Single-Port SRAM compiler, Memory Array Range:256 to 128K Bits

VeriSilicon SMIC 0.13um High-Speed Synchronous Single-Port SRAM compiler optimized for Semiconductor Manufacturing International Corporation (SMIC) 0.13um Logic 1P8M Salicide 1.2/2.5(3.3)V process ...

2
VeriSilicon SMIC 0.13um Ultra-Low-Power Synchronous Single-Port SRAM compiler,Memory Array Range:512 to 512K Bits

VeriSilicon SMIC 0.13um Ultra-Low-Power Synchronous Single-Port SRAM compiler optimized for Semiconductor Manufacturing International Corporation (SMIC) 0.13um Logic 1P8M Salicide 1.2/2.5(3.3)V ...

3
VeriSilicon SMIC 0.13umLL 1P3M High-Density Synchronous Single-Port SRAM compiler, Memory Array Range:128 to 512K Bits

SMIC 0.13umLL 1P3M High-Density Synchronous Single-Port SRAM compiler optimized for Semiconductor Manufacturing International Corporation (SMIC) 0.13um Low Leakage 1P3M Salicide 1.5/2.5(3.3)V ...

4
Internal Synchronous SRAM Controller Core

The SRAM-CTRL implements a SRAM Controller providing a standard AHB/APB interface to translate AHB/APB bus reads and writes into reads and writes with the signaling and timing of a standard ...

5
Single Port SRAM Compiler IP, 4.0um2 bit cells, Synchronous high density, UMC 0.18um LL process

UMC 0.18um LL Logic process synchronous high density Single Port SRAM memory compiler.

6
Single Port SRAM Compiler IP, 4.0um2 bit cells, Synchronous high density, UMC 0.18um HV process

UMC 0.18um high voltage 1.8V process synchronous high density Single Port SRAM memory compiler.

7
Single Port SRAM Compiler IP, 5.6um2 bit cells, Synchronous, UMC 0.18um eFlash/G2 process

UMC 0.18um e-flash GII Logic process synchronous Single Port SRAM memory compiler.

8
Single Port SRAM Compiler IP, 4.0um2 bit cells, Synchronous high density, UMC 0.18um CIS process

UMC 0.18um CMOS Image Sensor process synchronous high density Single Port SRAM memory compiler.

9
Single Port SRAM Compiler IP, 4.0um2 bit cells, Synchronous high density, UMC 0.18um MS process

UMC 0.18um Mixed-Mode process synchronous high density Single Port SRAM memory compiler.

10
Single Port SRAM Compiler IP, 4.0um2 bit cells, Synchronous, UMC 0.18um eFlash/G2 process

UMC 0.18um eFlash process GII 4.0um2 Single Port SRAM compiler.

11
Single Port SRAM Compiler IP, 4.0um2 bit cells, Synchronous high speed , UMC 0.18um G2 process

UMC 0.18um GII Logic process synchronous high speed Single Port SRAM memory compiler.

12
UMC 40nm low power process standard synchronous one port register file SRAM memory compiler with HVT peripheral.

UMC 40nm low power process standard synchronous one port register file SRAM memory compiler with HVT peripheral.

13
UMC 40nm low power process standard synchronous one port register file SRAM memory compiler with LVT peripheral.

UMC 40nm low power process standard synchronous one port register file SRAM memory compiler with LVT peripheral.

14
UMC 40nm embedded high voltage (eHV) low power Process standard synchronous high density single port register file SRAM memory compiler.

UMC 40nm embedded high voltage (eHV) low power Process standard synchronous high density single port register file SRAM memory compiler.

15
UMC 90nm Standard Performance LowK Logic Process Synchronous high density single port register file SRAM memory compiler

UMC 90nm Standard Performance LowK Logic Process Synchronous high density single port register file SRAM memory compiler

16
UMC 28nm Logic process standard synchronous RVT periphery high density single port SRAM memory compiler.

UMC 28nm Logic process standard synchronous RVT periphery high density single port SRAM memory compiler.

17
UMC 28nm Logic process standard synchronous LVT periphery high density single port SRAM memory compiler.

UMC 28nm Logic process standard synchronous LVT periphery high density single port SRAM memory compiler.

18
UMC 28nm Logic process standard synchronous LVT periphery high density single port SRAM memory compiler.

UMC 28nm Logic process standard synchronous LVT periphery high density single port SRAM memory compiler.

19
UMC 28nm Logic process standard synchronous RVT periphery high density single port SRAM memory compiler with row redundancy.

UMC 28nm Logic process standard synchronous RVT periphery high density single port SRAM memory compiler with row redundancy.

20
UMC 28nm HPC process standard synchronous HVT periphery high density single port low power SRAM memory compiler with row redundancy

UMC 28nm HPC process standard synchronous HVT periphery high density single port low power SRAM memory compiler with row redundancy

21
UMC 28nm HPC process standard synchronous LVT periphery high density single port low power SRAM memory compiler with row redundancy

UMC 28nm HPC process standard synchronous LVT periphery high density single port low power SRAM memory compiler with row redundancy

22
UMC 28nm HPC process standard synchronous high density single port low power SRAM memory compiler with row redundancy

UMC 28nm HPC process standard synchronous high density single port low power SRAM memory compiler with row redundancy

23
UMC 28nm HPM process standard synchronous high density single port SRAM memory compiler

UMC 28nm HPM process standard synchronous high density single port SRAM memory compiler

24
UMC 28nm HPM process synchronous LVT preiphery high density single port SRAM memory compiler with Row and 2 Column Repair

UMC 28nm HPM process synchronous LVT preiphery high density single port SRAM memory compiler with Row and 2 Column Repair

25
UMC 40nm LP process synchronous high density (0.213LPHVT cell) single port SRAM compiler with row redundancy.

UMC 40nm LP process synchronous high density (0.213LPHVT cell) single port SRAM compiler with row redundancy.

26
UMC 55nm eFlash process process synchronous low power feature RVT peripheral high density single port SRAM compiler.

UMC 55nm eFlash process process synchronous low power feature RVT peripheral high density single port SRAM compiler.

27
UMC 55nm eFlash process synchronous low power feature RVT peripheral high density single port SRAM compiler with row redundancy.

UMC 55nm eFlash process synchronous low power feature RVT peripheral high density single port SRAM compiler with row redundancy.

28
UMC 55nm ULP-SST process standard synchronous high density single port SRAM memory compiler.

UMC 55nm ULP-SST process standard synchronous high density single port SRAM memory compiler.

29
UMC 55nm ULP-SST process standard synchronous high density single port SRAM memory compiler.

UMC 55nm ULP-SST process standard synchronous high density single port SRAM memory compiler.

30
UMC 40nm LP Logic Process standard synchronous high density dual port SRAM memory compiler with LVT

UMC 40nm LP Logic Process standard synchronous high density dual port SRAM memory compiler with LVT

31
UMC 40nm LP Logic Process standard synchronous high density dual port SRAM memory compiler with ROW redundancy with LVt peripheral

UMC 40nm LP Logic Process standard synchronous high density dual port SRAM memory compiler with ROW redundancy with LVt peripheral

32
UMC 40NM Low-K Low Power synchronous Feature Dual Port SRAM memory compiler

UMC 40NM Low-K Low Power synchronous Feature Dual Port SRAM memory compiler

33
UMC 40NM Low-K Low Power synchronous Feature Dual Port SRAM memory compiler

UMC 40NM Low-K Low Power synchronous Feature Dual Port SRAM memory compiler

34
UMC 40nm Low-K Low Power synchronous Feature Dual Port SRAM memory compiler

UMC 40nm Low-K Low Power synchronous Feature Dual Port SRAM memory compiler

35
UMC 0.5um Logic process standard synchronous high density single port SRAM memory compiler.

UMC 0.5um Logic process standard synchronous high density single port SRAM memory compiler.

36
UMC 0.5um Logic process standard synchronous high density single port SRAM memory compiler.

UMC 0.5um Logic process standard synchronous high density single port SRAM memory compiler.

37
HJTC 0.18um pFlash Process synchronous High Density, Low Power mini single port SRAM

HJTC 0.18um pFlash Process synchronous High Density, Low Power mini single port SRAM

38
UMC 0.13um Al Standard performance process standard synchronous high density dual port SRAM compiler

UMC 0.13um Al Standard performance process standard synchronous high density dual port SRAM compiler

39
UMC 65nm SP LowK Logic Process synchronous single port register file SRAM memory compiler.

UMC 65nm SP LowK Logic Process synchronous single port register file SRAM memory compiler.

40

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