USB 3.1 PHY (10G/5G) inTSMC (16nm, 12nm, N7, N6, N5,N3E, N3P)
5-stage pipeline core RISC-V processor
NVM Anti-Fuse OTP NeoFuse in XMC (55nm)
PCIe Gen 6 SERDES IP - supports up to 112G LR ethernet with low power and latency
VeriSilicon Unveils a High-Efficiency LCEVC Video Decoder Supporting 8K Ultra HD
EnSilica Signs MoU with European Satellite Operator
ZeroPoint and Rebellions Forge Strategic Alliance to Revolutionize AI Accelerator Performance and Efficiency
What tamper detection IP brings to SoC designs
RISC-V in 2025: Progress, Challenges,and What's Next for Automotive & OpenHardware
Understanding MACsec and Its Integration
What's Your Vector? Synopsys Introduces New ARC VPX6 Digital Signal Processor
Vision Transformers Have Already Overtaken CNNs: Here's Why and What's Needed for Best Performance
How Physical AI Is Redefining the Automotive Industry
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