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1 217v voltage reference
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1 217v voltage reference IP Listing

1293 IP Cores (881 - 920)

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112G Ethernet PHY for TSMC N5

Synopsys Multi-Protocol 112G PHY IP is part of Synopsys’ high- performance multi-rate transceiver portfolio for high-end networking and high performance computing applications. The area-efficient ...

881
112G Ethernet PHY for VSR on TSMC N5

Synopsys Multi-Protocol 112G PHY IP is part of Synopsys’ high- performance multi-rate transceiver portfolio for high-end networking and high performance computing applications. The area-efficient ...

882
112G Ethernet PHY IP for TSMC N6

The Synopsys 112G Ethernet PHY IP, an integral part of Synopsys’ high-speed SerDes IP portfolio, meets the growing high bandwidth and low latency needs of high-performance data center applications. ...

883
112G Ethernet PHY IP for TSMC N6

The Synopsys 112G Ethernet PHY IP, an integral part of Synopsys’ high-speed SerDes IP portfolio, meets the growing high bandwidth and low latency needs of high-performance data center applications. ...

884
Multiprotocol 10G PHY in Samsung (8nm)

The multi-lane Synopsys IP Multi-Protocol 10G PHY IP is part of Synopsys’ high- performance multi-rate transceiver portfolio, meeting the growing needs for low- power consumption and low latency ...

885
Multiprotocol 10G PHY in TSMC (16nm, N7)

The multi-lane Synopsys IP Multi-Protocol 10G PHY IP is part of Synopsys’ high- performance multi-rate transceiver portfolio, meeting the growing needs for low- power consumption and low latency ...

886
112G VSR PHY in TSMC (N5, N3P)

Synopsys IP Multi-Protocol 112G PHY IP is part of Synopsys’ high- performance multi-rate transceiver portfolio for high-end networking and high performance computing applications. The area-efficient ...

887
112G PHY in TSMC (N7, N5)

Synopsys IP Multi-Protocol 112G PHY IP is part of Synopsys’ high- performance multi-rate transceiver portfolio for high-end networking and high performance computing applications. The area-efficient ...

888
PCIe 3.0 PHY in TSMC (28nm, 12nm, N4P)

The multi-channel Synopsys PHY IP for PCI Express® 3.1 includes Synopsys’ high-speed, high-performance transceiver to meet today’s applications’ demands for higher bandwidth. The PHY ...

889
PCIe 4.0 PHY in Samsung (14nm, 8nm) for Automotive

The multi-channel Synopsys PHY IP for PCI Express® 4.0 includes Synopsys’ high-speed, high-performance transceiver to meet today’s applications’ demands for higher bandwidth. The PHY’s ...

890
PCIe 5.0 PHY in GlobalFoundries (12nm)

The multi-channel Synopsys PHY IP for PCI Express® 5.0 and CXL includes Synopsys’ high-speed, high-performance transceiver to meet today’s applications’ demands for higher bandwidth. ...

891
PCIe 4.0 PHY IP for SS 14LPU

The multi-channel Synopsys PHY IP for PCI Express® 4.0 includes Synopsys’ high-speed, high-performance transceiver to meet today’s applications’ demands for higher bandwidth. The PHY’s ...

892
UMC L110AELL 110nm DDR DLL - 24MHz-120MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock cycle. It uses a phase-locked analog delay ...

893
UMC L28EHV 28nm DDR DLL - 130MHz-650MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock cycle. It uses a phase-locked analog delay ...

894
UMC L28EHVLVT 28nm DDR DLL - 160MHz-800MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock cycle. It uses a phase-locked analog delay ...

895
UMC L28HPCLVT 28nm DDR DLL - 180MHz-900MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock cycle. It uses a phase-locked analog delay ...

896
16x8 Bits OTP (One-Time Programmable) IP, TSM- CM018G 0.18μm 1.8V/3.3V Process

The ATO00016X8TS180CMG3NA is organized as 16 bits by 8 one-time programmable (OTP) in 8-bit read and 1-bit program modes. This is a kind of non-volatile memory fabricated in TSM- CM018G 0.18μm ...

897
10MHz to 50MHz Fractional-N Phase-Locked Loop

APLL Fractional-N phase locked loop frequency synthesizer is intended for SoC clock generation and embeds a reference 10MHz – 50MHz XTAL oscillator, which is also able to work as an input ...

898
1.25 Gbps LVDS IPs library

040TSMC_LVDS_01 is a library including: • Transmitter LVDS driver (LVDS_TX); • Receiver LVDS driver (LVDS_RX); • Reference current/voltage source (LVDS_RS); • Reference current/voltage ...

899
Up to 400 Mbps DDR LVDS receiver

130GF_LVDS_01 is a LVDS receiver with data rate up to 400 Mbps (DDR mode). The LVDS receiver converts input LVDS signal to differential CMOS 1.5V standard and transmits it through the OUTP and ...

900
12-bit 1-channel up to 100kSPS low power SAR ADC

130GF_ADC_01 is a 12 bit, 1-channel, low power SAR ADC with sampling rates up to 100 kSPS. The ADC has two operating modes: single-shot conversion and continuous conversion, set by the CONV_MODE ...

901
20mA and 500mA LDO voltage regulators (output voltage 2.5V)

055TSMC_LDO_06 is a cap-based LDO voltage regulator designed to supply integrated circuits with stable and precise voltage. 2.5V. The LDO converts IO voltage 3.3V to VDDA25 (2.5V) to supply ...

902
256x1 Bits OTP (One-Time Programmable) IP, Abli- 130 nm 130nm BCD with 5V CMOS Core Process

The ATO00256X1AB130MXX3XX00A is organized as a 256-bit by 1 one-time programmable (OTP). This is a kind of non-volatile memory fabricated in 0.13µm standard CMOS 5V-only logic process. The ...

903
16x16 Bits OTP (One-Time Programmable) IP, SMI- 0.18μm BCDM 1.8V/5V process

The ATO0016X16SM180BS33NA is organized as 16 bits by 16 one-time programmable (OTP) in 16-bit read and 1-bit program modes. This is a kind of non-volatile memory fabricated in SMIC 0.18μm 1.8V/5V ...

904
16x8 Bits OTP (One-Time Programmable) IP, X-FA- 0.18um XH018 1.8V/3.3V process

The ATO00016X8XH18018P4DA is organized as a 16-bit by 8 one-time programmable (OTP). This is a kind of non-volatile memory fabricated in 0.18µm XH018 Modular Mixed Signal process. The OTP ...

905
14-bit 1-channel 40 to 125 MSPS pipelined ADC

055TSMC_ADC_15 is a high-speed 14-bit ADC, employs a high-performance differential pipeline architecture. This ADC consist of 14-bit pipelined ADC core, output logic, reference voltage buffer, ...

906
27.12 MHz crystal oscillator

180TSMC_OSC_05 is a reference frequency generator designed to form a 27.12 MHz reference signal. The reference signal indicator informs the control system about the generation failure or the ...

907
1GHz to 3GHz, 6MHz to 100MHz Fractional-N Phase-Locked Loop

180TSMC_PLL_10 is designed to generate a high frequency signal in a range from 1GHz to 3GHz and a low frequency clock signal in a range from 6MHz to 100MHz. The frequency synthesizer consists ...

908
5-60V Input Buck Regulator (Type-C EPR compatible)

The OT1152 is an 80mA CMOS buck regulator designed for use with high input voltages and logic level output voltages.. This implementation takes a 4.5-60V input and produces a 5V voltage output ...

909
112Gb/s PAM4 SERDES PHY 14nm

The Ethernet PHY IP is used for CEI-112G applications and serializes 8b/10b encoded data for Gen1 and Gen2, as well as 128b/130b encoded data for Gen3 and Gen4 during transmission, while de-serializing ...

910
UCIe 1.1 PHY 5nm

The UCI Express Specification Revision 1.1 supports high-speed serialization and deserialization at 4GT/s, 8GT/s, 12GT/s, and 16GT/s with a 16-lane configuration, providing a 256-bit data bus ...

911
Dual channel 12-bit, 640MS/s ADC IP for WIFI6 in TSMC 22nm ULL

ADIQ12B640MT22ULL is a Dual channel 12-bit analog-to-digital converter (ADC) that operates up to 640MS/s. This ADC samples wide bandwidth analog signals with good linearity best suited for many ...

912
Dual channel 12-bit, 640MS/s DAC IP for WIFI6 in TSMC 22nm ULL

DAIQ12CS640MT22ULL is high performance 12b current steering IQDAC that supports data rate up-to 640Msps. Each DAC core consists of a current source matrix with quad switching architecture, controlled ...

913
12b, 640Msps, 0.9/1.8V Self Calibrating, Current steering DAC with Low area in UMC 28nm

DA12B640MU28HPC is high performance 12b current steering DAC that supports data rate up-to 640Msps. DAC core consists of a current source matrix with quad switching architecture, controlled ...

914
12b, 3.3Gsps, 0.9/1.8V Self Calibrating, Current steering DAC with Low area in UMC 28nm

DA12B3300MU28HPC is high performance 12b current steering DAC that supports data rate up-to 3.3Gsps. DAC core consists of a current source matrix with quad switching architecture, controlled ...

915
Capacitor-less Low Dropout regulator (LDO) 30 mA output

The ICPMLDO101_GF22FDX is capacitor-less linear voltage regulator in GF 22nmFDX. The LDO operates for a single input voltage in the range 1.4V to 1.9V. The regulated output voltage range is ...

916
Ultra-Low-Power (<140nA) Bandgap Voltage Reference in 40nm CMOS

The ODT-REF-40LP-SV1P8-ULP140N is an ultra-low power CMOS bandgap reference designed in a 40nm standard CMOS process without needing the use of any bipolar devices. This IP operates over a temperature ...

917
VREF Very High PSRR & Low Quiescent Band Gap (90 dB) - TSMC 28nm

The SGC21300 is a very high PSRR, very low noise band gap voltage reference that provides a fixed voltage outputs from inputs between 1.8V and 5.5V. The architecture of the SGC21300 enables ...

918
VREF Very High PSRR & Low Quiescent Band Gap (90 dB) - GLOBALFOUNDRIES 40nm

The SGC21300 is a very high PSRR, very low noise band gap voltage reference that provides a fixed voltage outputs from inputs between 1.8V and 5.5V. The architecture of the SGC21300 enables ...

919
VREF Very High PSRR & Low Quiescent Band Gap (90 dB) - TSMC 40nm

The SGC21300 is a very high PSRR, very low noise band gap voltage reference that provides a fixed voltage outputs from inputs between 1.8V and 5.5V. The architecture of the SGC21300 enables ...

920

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