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Embedded eeprom ip 256x1 bits for 1 8v 3 3v logic IP Listing

56 IP Cores (1 - 40)

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Embedded flash IP, 1.32V/3V 90nm

LEE Flash G1 (G1) is based on simple SONOS architecture and capable to scale down to 40nm and supports auto grade temperature and quality. G1 is cost effective embedded flash IP to support ...

1
256x16 Bits OTP (One-Time Programmable) IP, TSM- 152nm 1.8V/3.3V GP MS Process

The AT256X16T152LP0AA is organized as 256 bits by 16 one-time programmable in 16-bit read and 1-bit program modes. This is a kind of non-volatile memory fabricated in standard TSM- 152nm GP ...

2
3.6Kbit EEPROM IP with configuration 28p8w16bit

GF130_EEPROM_01 is a nonvolatile electrically erasable programmable read-only memory (EEPROM) with volume 3.6Kbit, which is organized as 28 pages of 8 words by 16 bits with single-bit output ...

3
RT-640 Embedded Hardware Security Module (HSM) for Automotive ASIL-B

Rambus Hardware Root of Trust RT-640 is a fully programmable, ISO-26262 ASIL-B ready hardware security core offering security by design for automotive applications. It protects against a wide ...

1 Testimonial
Hweihn Chung, CTO, NextChip

4
256x1 Bits OTP (One-Time Programmable) IP, UM- 110 nm 1.2V/3.3V L110AE Process

The AT256X1U110MAE0AC is organized as a 256-bit by 1 one-time programmable (OTP). This is a kind of non-volatile memory fabricated in UM- 110 nm 1.2V/3.3V L110AE process. The OTP can be widely ...

5
256x1 Bits OTP (One-Time Programmable) IP, UM- 110 nm 1.2V/3.3V L110AE Process

The AT256X1U110MAE0AB is organized as 256 bits by 1 one-time programmable in 1-bit read and 1-bit program modes. This is a kind of non-volatile memory fabricated in UM- 110nm standard CMOS core ...

6
256x16 Bits OTP (One-Time Programmable) IP, 256x16 Bits One Time Programmable Device SMI- 110nm 1.2V/3.3V Mixed Signal Generic Process

The AT256X16Z110LL0AA is organized as 256 bits by 16 one-time programmable in 16-bit read and 1-bit program modes. This is a kind of non-volatile memory fabricated in standard SMI-110nm low ...

7
256x1 Bits OTP (One-Time Programmable) IP, VI- 110 nm 1.2V/5.0V BCD Process

The AT256X1V110BCD0AA is organized as 256 bits by 1 one-time programmable in 1-bit read and 1-bit program modes. This is a kind of non-volatile memory fabricated in VI- 110nm BCD standard core ...

8
180nm FTP Non Volatile Memory for Standard CMOS Logic Process

NSCore's PermSRAM(R) is the only embedded CMOS, one time programmable (OTP), non-volatile RAM IP of its kind, utilizing the 'hot carrier effect' to trap charge in the sidewall spacer of the ...

9
130nm OTP Non Volatile Memory for Standard CMOS Logic Process

NSCore's PermSRAM(R) is the only embedded CMOS, one time programmable (OTP), non-volatile RAM IP of its kind, utilizing the 'hot carrier effect' to trap charge in the sidewall spacer of the ...

10
NVM OTP NeoBit in TSMC (350nm, 250nm, 180nm, 160nm, 130nm, 110nm, 90nm, 80nm, 55nm, 40nm)

eMemory's NeoBit OTP (One-Time Programmable) IP can be implemented seamlessly in various CMOS technologies such as logic, mixed-mode, analog, Radio-Frequency(RF) and high voltage(HV) processes ...

11
NVM OTP NeoBit in CSMC (350nm, 250nm, 180nm, 160nm)

eMemory's NeoBit OTP (One-Time Programmable) IP can be implemented seamlessly in various CMOS technologies such as logic, mixed-mode, analog, Radio-Frequency(RF) and high voltage(HV) processes ...

12
NVM OTP NeoBit in GLOBALFOUNDRIES (350nm, 250nm, 180nm, 160nm, 150nm, 130nm, 110nm, 65nm, 55nm)

eMemory's NeoBit OTP (One-Time Programmable) IP can be implemented seamlessly in various CMOS technologies such as logic, mixed-mode, analog, Radio-Frequency(RF) and high voltage(HV) processes ...

13
NVM OTP NeoBit in MagnaChip (350nm, 180nm, 150nm, 130nm, 110nm)

eMemory's NeoBit OTP (One-Time Programmable) IP can be implemented seamlessly in various CMOS technologies such as logic, mixed-mode, analog, Radio-Frequency(RF) and high voltage(HV) processes ...

14
NVM OTP NeoBit in SMIC (350nm, 180nm, 160nm, 130nm, 110nm)

eMemory's NeoBit OTP (One-Time Programmable) IP can be implemented seamlessly in various CMOS technologies such as logic, mixed-mode, analog, Radio-Frequency(RF) and high voltage(HV) processes ...

15
NVM OTP NeoBit in Vanguard (350nm, 250nm, 180nm, 160nm, 150nm, 110nm)

eMemory's NeoBit OTP (One-Time Programmable) IP can be implemented seamlessly in various CMOS technologies such as logic, mixed-mode, analog, Radio-Frequency(RF) and high voltage(HV) processes ...

16
OTP One Time Programmable IP SIL180

Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The required voltage for OTP bit cell programming can ...

17
3D OpenGL ES 1.1 GPU (Graphics Processing Unit)

D/AVE 3D is cost-efficient IP core for 3D graphics applications. This core is available for FPGAs, ASICs and SOCs, specifically designed for the embedded, automotive and infotainment market ...

18
Triple DAC 10-Bits, voltage output - 10Mhz, 3.3V/1.3V full-scale

This IP is a triple channel 10-bits 10 MS/s general purpose voltage output DAC, optimized for analog LCD controller application and designed for industry standard 0.18um 1P6M CMOS technology ...

19
DO-254 FIFO Generator 1.00a

Generates fully verified first-in, first-out (FIFO) memory queues ideal for applications requiring in-order data storage and retrieval. Basically it puts logic around a BRAM to make it a FIFO. ...

20
Embedded FPGA

SPC (Synthesizable Programmable Core) is a soft FPGA core that is fully integrated into standard design flows and that allows the seamless implementation of generic RTL programmable logic in ...

21
55nmHV MTP Non Volatile Memory for Standard CMOS Logic Process

NSCore's TwinBit(TM) is the only embedded CMOS, multi-time programmable (MTP), non-volatile RAM IP of its kind, utilizing the 'hot carrier effect' to trap charge in the sidewall spacer of the ...

22
LogiCore AXI Thin Film Transistor (TFT) Controller

Included at no additional charge with Vivado™ Design and System edition of software. The Xilinx LogiCORE™ IP AXI Thin Film Transistor (TFT) controller is a hardware ...

23

LPDDR5/4/4X PHY in GF (12nm)

The Synopsys LPDDR5/4/4X PHY is Synopsys’ physical (PHY) layer IP interface solution for ASICs, ASSPs, system-on-chips (SoCs) and system- in-package applications requiring high-performance ...

24

LPDDR5/4/4X PHY in TSMC (16nm, 12nm, N7, N6, N5)

The Synopsys LPDDR5/4/4X PHY is Synopsys’ physical (PHY) layer IP interface solution for ASICs, ASSPs, system-on-chips (SoCs) and system- in-package applications requiring high-performance ...

25

LPDDR5/4/4X PHY in Samsung (14nm) for Automotive

The Synopsys LPDDR5/4/4X PHY is Synopsys’ physical (PHY) layer IP interface solution for ASICs, ASSPs, system-on-chips (SoCs) and system- in-package applications requiring high-performance ...

26

Programmable Clock Generator

The logiCLK is a programmable clock generator logicBRICKS IP core with twelve independent and fully configurable clock outputs. While six clock outputs can be fixed by generic parameters prior ...

27

IBM 65nm 12-bit 1M/200K Single/Differential 2.5v Rail to Rail SAR ADC

This analog-to-digital converter (ADC) uses successive approximation register (SAR) architecture to achieve 12-bit resolution. The ADC includes internal sample/hold circuits, a capacitive DAC, ...

28

IBM 65nm 12-Bit 8-Input 1M/200k SAR ADC

This analog-to-digital converter uses Successive Approximation Register (SAR) architecture to achieve 12-bit resolution. The IP includes a core internal SAR ADC, 8-1 MUX and touch screen drivers. ...

29

IBM 65nm 12Bit 1M/200K Single/Differential 2.5v Rail to Rail SAR ADC

This analog-to-digital converter (ADC) uses successive approximation register (SAR) architecture to achieve 12-bit resolution. The ADC includes internal sample/hold circuits, a capacitive DAC, ...

30

IBM 65nm 12-Bit 8-Input 1M/200k SAR ADC

This analog-to-digital converter uses Successive Approximation Register (SAR) architecture to achieve 12-bit resolution. The IP includes a core internal SAR ADC, 8-1 MUX and touch screen drivers. ...

31

TSMC 55nm 12-Bit 8-Input 1M/200k SAR ADC

This analog-to-digital converter uses Successive Approximation Register (SAR) architecture to achieve 12-bit resolution. The IP includes a core internal SAR ADC, 8-1 MUX and touch screen drivers. ...

32

TSMC 65nm 12-Bit 8-Input 1M/200k SAR ADC

This analog-to-digital converter uses Successive Approximation Register (SAR) architecture to achieve 12-bit resolution. The IP includes a core internal SAR ADC, 8-1 MUX and touch screen drivers. ...

33

GLOBALFOUNDRIES 0.13um 12-Bit 8-Input 1M SAR ADC

This analog-to-digital converter uses Successive Approximation Register (SAR) architecture to achieve 12-bit resolution. The IP includes a core internal SAR ADC, 8-1 MUX and touch screen drivers. ...

34

GLOBALFOUNDRIES 0.11um 12-Bit 8-Input 1M SAR ADC

This analog-to-digital converter uses Successive Approximation Register (SAR) architecture to achieve 12-bit resolution. The IP includes a core internal SAR ADC, 8-1 MUX and touch screen drivers. ...

35

GF40nm 12-bit 1M/200K Single/Differential 2.5v Rail to Rail SAR ADC

This analog-to-digital converter (ADC) uses successive approximation register (SAR) architecture to achieve 12-bit resolution. The ADC includes internal sample/hold circuits, a capacitive DAC, ...

36

This analog-to-digital converter (ADC) uses successive approximation register (SAR) architecture to achieve 12-bit resolution.

This analog-to-digital converter (ADC) uses successive approximation register (SAR) architecture to achieve 12-bit resolution. The ADC includes internal sample/hold circuits, a capacitive DAC, ...

37

12-Bit SAR ADC in GlobalFoundries 22nm FDSOI

This analog-to-digital converter (ADC) uses successive approximation register (SAR) architecture to achieve 12-bit resolution. The ADC includes internal sample/hold circuits, a capacitive DAC, ...

38

12-Bit SAR ADC in GlobalFoundries 22nm FDSOI

This analog-to-digital converter (ADC) uses successive approximation register (SAR) architecture to achieve 12-bit resolution. The ADC includes internal sample/hold circuits, a capacitive DAC, ...

39

Memory Controller for embeded systems supporting SDRAM and NandFlash, with bootstrap loader

RDEMC handles NandFlash and SDRAM, during RESET a bootstrap loader (512 Bytes) are copied from the NandFlash to the SDRAM. Thus eleminating the need of an extra Bootdevice. The RDEMC is therefore ...

40

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