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Graham ls5/3 IP Listing

9022 IP Cores (1 - 40)

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CXL 3.0 Integrity and Data Encryption Security Module

The Compute Express Link (CXL) interface protocol enables low-latency data communication between system-on-chip (SoC) and general-purpose accelerators, memory expanders, and smart I/O devices ...

1
RISC-V ARC-V RMX-100 Ultra-low Power 32-bit Processor IP for Embedded Applications

The Synopsys ARC-V™ RMX-100 series processors are optimized for use in embedded applications where power and area are the utmost concern. The DSP enhanced implementation (RMX-100D) adds DSP ...

2
ARC-V RMX-500 power efficient 32-bit RISC-V processor for embedded applications

The Synopsys ARC-V™ RMX-500 series processors are optimized for use in embedded applications where power and performance efficiency are key concerns. The DSP enhanced implementation (RMX-500D) ...

3
ARC-V RHX-105 dual-issue, 32-bit RISC-V processor for real-time applications (multi-core)

The Synopsys ARC-V™ RHX-100 series processors feature a dual-issue, 32-bit superscalar architecture for use in applications where real-time performance is required. The cores offer outstanding ...

4
ARC-V RMX-100 ultra-low power 32-bit RISC-V processor for embedded applications

The Synopsys ARC-V™ RMX-100 series processors are optimized for use in embedded applications where power and area are the utmost concern. The DSP enhanced implementation (RMX-100D) adds DSP ...

5
ARC-V RHX-100 dual-issue, 32-bit single-core RISC-V processor for real-time applications

The Synopsys ARC-V™ RHX-100 series processors feature a dual-issue, 32-bit superscalar architecture for use in applications where real-time performance is required. The cores offer outstanding ...

6
Multi-Protocol Crypto Packet Engine, Low Power, Bus Attached

The EIP-93 is a Multi-Protocol Engine. The EIP-93 is designed to off-load the host processor to improve the speed of protocol operations and reduce power in cost-sensitive networking products, ...

7
Multi-Protocol Crypto Engine

The EIP-97 is a Cryptographic Engine designed to offload the Host processor to improve the speed of IPsec ESP, IPsec AH, SRTP, SSL, TLS, DTLS and MACsec protocol operations and reduce power ...

8
Multi-Protocol Crypto Engine with Classification

The EIP-197 is a family of high speed Cryptographic Accelerators with embedded Classification Engine, Virtualization, Latency compensation to maintain performance under stress conditions in ...

9
HBM3E/3 Memory Controller

The Rambus HBM3E/3 Controller Cores are designed for use in applications requiring high memory throughput, low latency and full programmability. The cores accept commands using a simple ...

1 Testimonial
June Paik, CEO, Furiosa

10
Compute Express Link (CXL) 3.1 Controller

The Rambus Compute Express Link® (CXL®) 3.1 controller is a parameterizable design for ASIC and FPGA implementations. It leverages the Rambus PCIe® 6.1 controller architecture for the CXL.io ...

11
USB 2.0 PHY TSMC 5nm, 6/7nm, 12/16nm, 22nm, 28nm, 40nm, 65nm, 130nm, 180nm

The Arasan USB 2.0 PHY IP core is a transceiver compliant with the USB 2.0 Transceiver Macrocell Interface Plus (UTMI+) level 3 specification, for use with host, embedded host, On-the-Go (OTG) ...

12
USB 2.0 PHY GlobalFoundaries 12nm, 22nm, 28nm, 40nm

The Arasan USB 2.0 PHY IP core is a transceiver compliant with the USB 2.0 Transceiver Macrocell Interface Plus (UTMI+) level 3 specification, for use with host, embedded host, On-the-Go (OTG) ...

13
Securyzr iSE 100/300/700/900 series by Secure-IC: integrated Secure Element (iSE) for multiple applications

As part of Secure-IC's iSSP (integrated Security Services Platform), Secure-IC is able to provide integrated Secure Elements (iSE) that can act as trust anchors that protect the security assets ...

14
Securyzr iSE S700 neo series by Secure-IC: an integrated Secure Element (iSE) for automotive

As part of Secure-IC's iSSP (integrated Security Service Platform), Secure-IC is able to provide integrated Secure Elements (iSE) that can act as trust anchors that protect the security assets ...

15
TSMC CLN7FFLVT 7nm DDR DLL - 360MHz-1800MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock cycle. It uses a phase-locked analog delay ...

16
TSMC CLN7FFLVT 7nm Deskew PLL - 300MHz-1500MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the clock reference by an integer between 1 ...

17
TSMC GF Intel Samsung Deskew Frequency Synthesizer PLL

High-bandwidth, De-Skew Frequency Synthesizer for minimizing clock tree timing uncertainty. See our features list for more details.

18
TSMC GF Intel Samsung Fractional-N Frequency Synthesizer PLL

Widely programmable fractional-N delta sigma frequency synthesizer with industry leading jitter performance. See our features list for more details.

1 Testimonial
Kazuhisa Sasaki, General Manager, Development Department, THine Electronics, Inc.

19
TSMC GF Intel Samsung Integer-N Frequency Synthesizer PLL

Widely programmable integer-N frequency synthesizer with industry leading jitter performance and flexible power options. See our features list for more details.

20
TSMC Intel 32kHz Low-bandwidth Frequency Synthesizer PLL

Low-bandwidth, Ultra-Fast-Lock Frequency Synthesizer, capable to operate with a very low reference frequencies (32kHz - 33kHz). See our features list for more details.

1 Testimonial
Andreas Papaliolios, Director, IoT Silicon Technology, Architecture, and Design, Renesas USA

21
Multi-protocol SerDes PMA - PCIe1 PCIe2 PCIe3 PCIe4 PCIe5 and more

Multiprotocol SerDes PMA supporting variety of interfaces.

1 Testimonial
Lyle Smith, Vice President of Product Development Engineering, Microsemi SoC BU

22
TSMC GF Intel Low Phase Noise, High-performance Digital LC PLL

Fractional-N LC based frequency synthesizer with digital loop filter for high performance clock generation applications. See our features list for more details.

23
Multi-protocol SerDes PMA in FDSOI (GF22FDX FDX 22FDX) - PCIe1 PCIe2 PCIe3 PCIe4 and more

Multiprotocol SerDes PMA supporting variety of interfaces.

24
7-bit, 64 GSPS ADC Ultra Low Power

The ODT-ADS-7B64G-3 is an ultra-high-bandwidth time-interleaved ADC designed in a 3nm CMOS process. This 7-bit, 64GSPS ADC supports ac-coupled input signals up to Nyquist and features a full-scale ...

25
32-bit Embedded RISC-V Functional Safety Processor

The EMSA5-FS is a processor core designed for functional safety. The fault-tolerant processor uses dual or triple instances of the EMSA5, an efficient 32-bit embedded processor IP core implementing ...

1 Testimonial
Hugh O’Keeffe, CEO, Ashling

26
UCIe/BoW BlueLynx™ Dual Mode PHY and subsystem IP for chiplet interconnect

Blue Cheetah is a leader in Die-to-Die (D2D) interconnect solutions for chiplets in very advanced and low-cost packaging applications. BlueLynx™ is a revolutionary D2D subsystem architecture ...

27
UCIe PHY & D2D Adapter

Neuron IP’s UCIe PHY & D2D Adapter IP portfolio includes 32Gbps UCIe-Advanced (UCIe-A) & Standard (UCIe-S) cores as per the latest UCIe v1.1 specification for Chiplet products supporting various ...

28
InCore Calcite Series: 32b/64b RISC-V 5-stage, scalar, in-order, Application Processor. Linux and multi-core capable. Maps upto ARM A-35. Optimal PPA.

InCore Calcite is a 32/64 Bit RISC-V in-order, single-issue 5-stage pipelined micro-processor. Built on Incore's proprietary deep-customization stack for microarchitectural exploration, Calcite ...

29
Secure-IC's Securyzr™ Fully Digital Physically Unclonable Function (PUF) - PQC Ready

A Physically Unclonable Function (PUF) is a security mechanism that uses the inherent physical variations of a device to generate a unique, unclonable output. This output can be used as a ...

30

TSMC CLN20SOC 20nm Spread Spectrum PLL - 306MHz-1530MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable for PC and consumer electronics applications ...

31

GF L28SLP 28nm IoT PLL - 30MHz-550MHz

The IoT PLL is designed for very low power, sipping only 45uW at 30MHz and running from core power. It has a wide frequency range with multiplication factors up to 8192, allowing the PLL to ...

32

PCIe 5.0 Controller supporting Endpoint, Root Port, Switch, Bridge and advanced features

Rambus PCIe 5.0 Controller is a configurable and scalable PCIe controller Soft IP designed for ASIC and FPGA implementation. Rambus PCIe 5.0 Controller is compliant with the PCI Express 5.0 ...

2 Testimonials
June Paik, CEO, Furiosa

33

PCIe 5.0 Controller with AMBA AXI interface

Rambus PCIe 5.0 Controller is a configurable and scalable PCIe controller Soft IP designed for ASIC and FPGA implementation. Rambus PCIe 5.0 Controller is compliant with the PCI Express 5.0 ...

1 Testimonial
Russel Lindsay, Sr. Product Manager, Anritsu Corporation

34

Secure-IC's Securyzr™ Tunable Hash (SM3) Hardware accelerator

The SM3 hash algorithm is a cryptographic hash function designed by the Chinese Commercial Cryptography Administration Office (CCCAO) in order to propose new standards for digital signature ...

35

PCIe 5.0 Customizable Embedded Multi-port Switch

Rambus PCIe 5.0 Multi-port Switch is a customizable, Embedded PCIe Switch designed for ASIC and FPGA implementations enabling the connection of one upstream port and multiple downstream ports ...

36

CXL 3.0 IP

EMPOWER YOUR DESIGN WITH UNMATCHED CXL PERFORMANCE Highly advanced and versatile CXL Controller IP that empowers your design with unparalleled speed, efficiency, and scalability. At Rapid ...

37

Turnkey UWB MAC and PHY platform IP, for FiRa 2.0, CCC Digital Key 3.0, and Radar

Ceva-Waves UWB is a low power ultra-wideband (UWB) MAC and PHY platform IP based on 802.15.4 HRP, the FiRa Consortium and the Car Connectivity Consortium Digital Key (CCC DK) requirements. ...

38

DDR4/3, LPDDR5x/5/4x/4 Memory Controller IP

OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solution or independent IP. They are tightly combined ...

39

USB 2.0 OTG High / Full / Low- Speed Dual Role IP Core

Our company offers a highly configurable and adaptable USB 2.0 OTG controller IP core, suitable for a wide range of applications. This controller adheres to the latest industry standards (USB ...

40

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