A 130nm Wirebond IO library with 3.3V GPIO, LVDS TX & RX, 3.3V I2C open-drain, analog cell and OTP program cell

Key attributes of the 130nm IO library include an extended operational temperature range (-55°C to 200°C), sleep retention, and a built-in power regulation PMOS device for core VDD. The GPIO cell can be configured as input, output or open-drain with an optional internal 60K ohm pull-up or pull-down resistor and a selectable Schmitt trigger. ESD protection for IO and core supplies is constructed in an aggressive footprint. 3.3V LVDS TX & RX cells, along with 3.3V OTP programming, 3.3V I2C open drain and analog cells complement the GPIO offering. The library is enriched with feed-through, filler, corner and domain-break cells to allow for flexible pad ring construction.

Built into our IO libraries, and also offered as a separate service, is our strong ESD expertise. Certus was founded by ESD engineers and our results speak for themselves. Not only do we consistently exceed the standard ESD targets of 2KV HBM and 500V CDM, but we also provide on-chip solutions for standards such as IEC-61000-4-2, system-level ESD and Cable Discharge Events (CDE).

Certus supports IO libraries across multiple TSMC nodes including 180nm, 130nm, 40nm, 28nm, 22nm, and 16/12nm. Certus is particularly suited at providing custom variants in a cost-efficient framework. Please contact us for supplementary physical or electrical features that can suit your needs.

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