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Analog TV Demodulator and Decoder IP (Silicon Proven)
The Analog TV Demodulator and Decoder IP core is extracted from a production chip and a silicon-proven IP core. The Analog TV demodulator and decoder are two separate blocks of IP cores available as a single license. The input to the demodulator is digital I/Q LIF or Baseband, the input sample rate is customizable to meet the ADC requirement.
The Analog TV Decoder IP contains a high-quality front-end video circuit for processing all analog NTSC/PAL/SECAM standards into a 4:2:2 YCrCb digital video format as well as conventional analog RGB or YCrCb signals. The programmable through an I²C interface.
The provides a cost-effective solution for digitized TV, LCD TV/monitors, digital TV, STB, video surveillance security, video conferencing, video capturing devices, and PC video card.
The Analog TV Demodulator IP provides support for PAL, NTSC, and SECAM. The all-digital implementation is suitable for integration into digital demodulators and digital SOC devices. The solution covers worldwide TV standards, this IP core block also extracted from production SOC.
The input to the demodulator is digital I/Q at baseband at a 19.33 Msps sample rate. The input sample rate is customizable to meet the requirement and changes to the sample rate will require modifications to the filter chain.
For supporting an IF input, the IF frequency is customizable to meet the requirement. For IF inputs, phase rotation to baseband is accomplished by the “Freq correction” block at left using direct digital frequency synthesis (DDFS).
The Analog TV Decoder IP contains a high-quality front-end video circuit for processing all analog NTSC/PAL/SECAM standards into a 4:2:2 YCrCb digital video format as well as conventional analog RGB or YCrCb signals. The programmable through an I²C interface.
The provides a cost-effective solution for digitized TV, LCD TV/monitors, digital TV, STB, video surveillance security, video conferencing, video capturing devices, and PC video card.
The Analog TV Demodulator IP provides support for PAL, NTSC, and SECAM. The all-digital implementation is suitable for integration into digital demodulators and digital SOC devices. The solution covers worldwide TV standards, this IP core block also extracted from production SOC.
The input to the demodulator is digital I/Q at baseband at a 19.33 Msps sample rate. The input sample rate is customizable to meet the requirement and changes to the sample rate will require modifications to the filter chain.
For supporting an IF input, the IF frequency is customizable to meet the requirement. For IF inputs, phase rotation to baseband is accomplished by the “Freq correction” block at left using direct digital frequency synthesis (DDFS).
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Block Diagram of the Analog TV Demodulator and Decoder IP (Silicon Proven)
